pe_macro(1)
•
MoveTests4c
— MOV1: clear flag bits test (part 1)
•
MoveTests4d
— MOV1: clear flag bits test (part 2)
•
MoveTests4e
— MOV1: PReg to flag bit test
•
MoveTests4f
— MOV1: Immediate to PReg test
•
MoveTests5a
— MOV1UC: Flag to flag 1’s test (part 1)
•
MoveTests5b
— MOV1UC: Flag to flag 1’s test (part 2)
•
MoveTests5c
— MOV1UC: Flag to flag 0’s test (part 1)
•
MoveTests5d
— MOV1UC: Flag to flag 0’s test (part 2)
•
MoveTests5f
— MOV1UC: Immediate to PReg test
•
Else1ucTests
— ELSE1UC instruction test
•
MoveTests6
— 8-bit & 32-bit move test
3.
Load/store instruction tests
•
msol0
— Directly addressed solitary load/store test
•
msol1
— Indirectly addressed solitary load/store test
•
msol2
— Indirectly addressed single PE load/store test
•
LdSt
— Load/store instruction test
•
mtest0
— 32-bit direct load/store test
•
mtest1
— Load, store and M-bit queue test
•
mtest2
— Indirect load/store test
•
mtest3
— Simple indirectly addressed load/store test
•
mtest4
— 64-bit directly addressed load/store test
•
mtest5
— 32-bit byte offset load/store test
•
tagtest0
— Tag stall test - many PReg’s to single PMem location
•
tagtest0f
— Tag stall test - many PReg’s to many PMem locations
4.
XNet instruction tests
•
xnetNW
— XNet shift NorthWest test
•
xnetN
— XNet shift North test
•
xnetNE
— XNet shift NorthEast test
•
xnetE
— XNet shift East test
•
xnetSE
— XNet shift SouthEast test
•
xnetS
— XNet shift South test
•
xnetSW
— XNet shift SouthWest test
•
xnetW
— XNet shift West test
•
xnet1
— Shift data from odd to even columns and back
•
onet
— XNet octagon shift test
•
onet1
— XNet octagon shift test (with PMem activity)
B–14 Data Parallel Unit Reference Pages
