pe_macro(1)
Sometimes the macro program sends data out the FRBEQ for awhile before
halting. The front-end program reports which record it was waiting for when it
timed out, and this information may prove useful.
Individual Test Descriptions
The following list describes the individual tests in alphabetical order:
•
AddTests1
: Register To Register ADD Test — This test performs 8-bit, 16-bit,
32-bit, and 64-bit addition between PRegs. It performs the following sums for
each of the four word sizes:
1 + 1 = 2
1 + –1 = 0
–1 + –1 = –2
1 + –81 = –80
It demonstrates the ability to handle both positive and negative numbers, as
well as the proper sign extension for each word size.
The test enables all the PEs and loads an identical set of data into each
PE’s PRegs. After each addition, the test performs a global OR of each PE’s
answer. If it detects an error, the test prints an error message which gives
the addition the test was attempting, the expected answer and the actual
answer.
After each addition, it performs a global OR of each PE’s flag bits. If any of
these is in error, an error message is printed giving the operation attempted,
the expected flag bits and the actual flag bits. The flag bits are collected as
shown:
2
1
0
n
z
v
c
Overflow flag
Zero flag
Negative flag
bit
3
Carry flag
MPP_FIG_276
If this test reports a wrong answer, it indicates that the fault is associated
with one or more PEs.
•
AddTests2
: Immediate To Register ADD Test — This test performs 8-bit,
16-bit, 32-bit, and 64-bit addition between an immediate and a PReg. It
performs the following sums for each of the four word sizes:
•
1 + 1 = 2
•
1 + –1 = 0
•
–1 + –1 = –2
•
1 + –81 = –80
It demonstrates the ability to handle both positive and negative numbers, as
well as the proper sign extension for each word size.
B–16 Data Parallel Unit Reference Pages
