pe_macro(1)
rflag
64[c0]
It successively moves a 0 from the source into each of the flag bits in the list
shown above.
SRC
Destination
Message Reference
~tsfag
Each flag bit
#1–#10
~fflag
Each flag bit
#11–#20
~rflag
Each flag bit
#21–#30
~64[c0]
Each flag bit
#31–#40
After moving 0 into all of the flag bits, it checks that each was cleared
properly.
If the test detects an error, it prints an error message giving the operation,
the expected result and the actual result.
•
MoveTests5f
: MOV1UC Immediate To PReg Test — Moves a 1 into 8
different PReg locations, then checks for errors; moves a 0 into the same
PReg locations, then checks for errors.
If the test detects an error, it prints an error message giving the attempted
operation, the expected results and the actual results.
•
MoveTests6
: 8-Bit & 32-Bit MOVE Test — Performs the following tests:
Test #1 — Makes the following 32-bit moves and checks the result:
0x5e461237 --> 16[c0] --> 1040[c0]
Test #2 — Makes the following 8-bit moves and checks the result:
0xa5 --> 0[c0] --> 1024[c0]
Test #3 — Makes the following 32-bit moves and checks the result:
0x12345678 --> acc --> 1040[c0]
Test #4 — Makes the following 8-bit moves and checks the result:
0xb6 --> acc --> 1024[c0]
If the test detects an error, it prints an error message giving the attempted
operation, the expected results and the actual results.
•
OrTests1
: Register To Register OR Test — This test performs 8-bit, 16-bit,
32-bit and 64-bit OR operations.
After each OR, if it detects an error, the test prints an error message which
gives the OR the test was attempting, the expected answer and the actual
answer.
After each OR, it checks the flag bits. If any of these is in error, an error
message is printed giving the operation attempted, the expected flag bits and
the actual flag bits. The flag bits are collected as shown:
Data Parallel Unit Reference Pages B–27
