R E C O R D O F C H A N G E
Data Device Corporation
DS-BU-67301B-G
1/14
ii
Revision
Date
Pages
Description
Pre Rev A
Sept., 2010
All
Preliminary release
Rev. A
Sept., 2011
All
Initial Release
Rev. B
Dec., 2011
6, 7, 9, 38, 113,
25-93, 95, 101-
115
Table 1: removed part numbers from Supply Voltage
section, changed Storage Temperature Max. from:
+150°C to: +125°C., added Ramp Rate specs, added
Junction Temperature (T
J
)
Table 7: Changed T
ah
min from 2ns to 7ns.
Table 25: removed redundant B1 listing in NC section.
Section 6: changed heading to Host Interface.
Added Section 7: Power Inputs
Tables 15 - 22: Added Pullup/Pulldown column and
values
Rev. C
Dec., 2011
10, 15, 96-97, 99,
100, 115
Table 1: Eliminated reference to “(Hottest Die)”.
Figure 5: Eliminated “MT 100 µs Timer (16-bit)” block.
Added Figure 56, Timing of CLK_IN, Logic_V
DDIO
,
PLL_+1.8V, and Core_+1.8V.
Figure 58: Made corrections
Figure 59: Made corrections
Table 22: Changed second column signal description
for nSINGEND(I).
Rev. D
January, 2012
7, 36-39, 55-58,
89. 96-98, 104,
107-108, 110,
122, 125
Figure 2: Added nPOR and PLL_LOCKED
Figures 7-10 and Figures 19-22: Added nPOR,
supervisor circuit, and PLL_LOCKED, modifed use of
nMSTCLR
Figure 48: Added nPOR and PLL_LOCKED
Paragraph 7.2: updated power-up sequence, modified
Figure 56
Table 15: Added nPOR and PLL_LOCKED
Table 18: Modified RST#
Table 19: Modified nMSTCLR
Table 26: Added nPOR and PLL_LOCKED
Figure 61: Added nPOR and PLL_LOCKED
Rev. E
Feb., 2012
98
Updated Figure 56
Rev. F
June, 2012
7, 104, 105
Figure 2: Corrected CH. A 1553 Stub designation
Tables 15 – 17: Adjusted column widths
Rev. G
January, 2014
11, 89
Updated Table 1 and Figure 48
