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DS87C550 High-Speed Microcontroller User’s Guide Supplement
45 of 93
PWM3 Frequency Generator Register (PW3FG)
7
6
5
4
3
2
1
0
SFR D5h
PW3FG.7 PW3FG.6 PW3FG.5 PW3FG.4 PW3FG.3 PW3FG.2 PW3FG.1 PW3FG.0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
RW-0
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
PW3FG.7-0
BitS 7-6
PWM3 Clock Generator Register.
This register contains the user defined
value, N which determines the repetition rate for 8-bit PWM channel 3. This
repetition rate (frequency) is given by the equation: Prescaler-Output-Frequency /
(N+1). This register is not used in 16-bit PWM operations.
16-Bit PWM Mode Enable and A/D Reference Select (PWMADR)
7
6
5
4
3
2
1
0
SFR D6h
ADRS
-
-
-
-
-
PWE1
PWE0
RW-0
-
-
-
-
-
RW-0
RW-0
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
ADRS
Bit 7
A/D Reference Select.
When set to 1, this bit selects an external source provided
on pins V
REF
+ and V
REF
- as the voltage reference for the A/D converter. When
cleared to 0, the internal bandgap provides the voltage reference for the A/D.
Bits 6-2
Reserved. Read data will be indeterminate.
PWE1
Bit 1
16-Bit PWM Enable 1.
Setting this bit to 1 enables the 16-bit PWM channel 1.
Clearing this bit disables 16-bit mode and enables 8-bit mode.
PWE0
Bit 1
16-Bit PWM Enable 0.
Setting this bit to 1 enables the 16-bit PWM channel 0.
Clearing this bit disables 16-bit mode and enables 8-bit mode.