DS87C550 High-Speed Microcontroller User’s Guide Supplement
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Parallel I/O Port Five (P5)
7
6
5
4
3
2
1
0
SFR C4h
P5.7
ADC7
P5.6
ADC6
P5.5
ADC5
P5.4
ADC4
P5.3
ADC3
P5.2
ADC2
P5.1
ADC1
P5.0
ADC0
RW-1
RW-1
RW-1
RW-1
RW-1
RW-1
RW-1
RW-1
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
P5.7-0
Bits 7-0
General Purpose I/O Port Five.
This register functions as an open drain 8-bit
bi-directional port. In addition, all the pins have an alternative function listed
below. Each of the functions is controlled by several other SFRs. The associated
Port 5 latch bit must contain a logic one before the pin can be used in its alternate
function capacity, otherwise the pin is forced to a strong zero.
ADC7-ADC0
Bits 7-0
A/D Converter Input Pins.
These pins provide the inputs to the 8 analog
multiplexer channels (7-0) of the A/D converter.
Status Register (STATUS)
7
6
5
4
3
2
1
0
SFR C5
PIP
HIP
LIP
-
SPTA1
SPRA1
SPTA0
SPRA0
R-0
R-0
R-0
R-0
R-0
R-0
R-0
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset, *=See description
PIP
Bit 7
Power Fail Priority Interrupt Status.
When set, this bit indicates that software
is currently servicing a power-fail interrupt. It is cleared when the program
executes the corresponding RETI instruction.
HP
Bit 6
High Priority Interrupt Status.
When set, this bit indicates that software is
currently servicing a high priority interrupt. It is cleared when the program
executes the corresponding RETI instruction.
LIP
Bit 5
Low Priority Interrupt Status.
When set, this bit indicates that software is
currently servicing a low priority interrupt. It is cleared when the program
executes the corresponding RETI instruction.
Bit 4
Reserved.
SPTA1
Bit 3
Serial Port 1 Transmit Activity Monitor.
When set, this bit indicates
that data
is currently being transmitted by serial port 1. It is cleared when the internal
hardware sets the TI_1 bit. Do not alter the Clock Divide Control (CD1:0) bits
while this bit is set or serial port data may be lost.
