SDM-2020 Satellite Demodulator
Data Interfaces
Rev.3
A–13
A.3
Low Voltage Differential Signal (LVDS) Interface
The following paragraphs describe the LVDS interface. This plug-in module provides the
physical and electrical interface between an SDM-2020 modulator or demodulator and
DVB or DBS signal sources operating with LVDS electrical characteristics. In TM1449,
this interface is called, “SPI.”
A.3.1 Applicable
Documents
Applicable specifications, as referenced herein, include:
TM1449
Interfaces for CATV/SMATV Headends and Similar Professional Equipment.
TIA/EIA-644
Telecommunications Industry Standard, Electrical Characteristics Of Low Voltage
Differential Signaling (LVDS) Interface Circuits
(originally
Standards Proposal
SP-3357
)
A.3.2 Description
The LVDS interface has dedicated transmit and receive connectors and an auxiliary
connector. The Receive Out connector is used with the demodulator while the Transmit In
connector is used with the modulator:
•
J3 Receive Out connector (25-pin D, female). This connector supports the
following data formats:
!
Parallel format: The interface is a DVB 8-bit parallel synchronous interface.
Data and clock exit the connector and the output clock (Clock A and Clock
B) is at the byte rate.
!
Serial format: MSB (Data7) is used for serial output data and the output
clock (Clock A and Clock B) is at the bit rate.
•
J4 Transmit In connector (25-pin D, female):
!
Parallel format: The interface is a DVB 8 bit parallel synchronous interface.
Data and clock are input to the connector and the input clock (Clock A and
Clock B) is at the byte rate.
!
Serial format: MSB (Data7) is used for serial input data and the input clock
(Clock A and Clock B) is at the bit rate.
Summary of Contents for SDM-2020
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