Remote Control Reference
4-23
to set up the enable masks of the Status Byte summary register.
Send
*OPC?
and enter the result to verify synchronization.
Now, if any of the conditions corresponding to the enabled summary bits in the Status
Byte register occurs, the power supply send a USB488 Interrupt-IN packet as shown as
the above table to the host.
4.3.2.3.3 Use *STB? to Read the Status Byte
*STB? is used to query the Status Byte register. The return value while querying the Status
Byte register is a decimal value that corresponds to the binary-weighted sum of the bits set in
the register. Since the request service bit (RQS, bit 6) of the Status Byte register is reported
and cleared by a SRQ process, you don’t have to read the state of the RQS bit with
*STB
.
Executing
*STB?
can’t clear the Status Byte summary register.
4.3.2.3.4 The Message Available Bit (MAV)
The Message Available bit (MAV, bit 4) of the Status Byte summary register indicates that
data in the power supply's output queue is available to read into USB bus. The MAV bit is
cleared only after all messages have been read from the output queue.
4.3.2.3.5 Use *OPC
The Operation Complete bit (OPC, bit 0) of the Standard Event register indicates if a
command sequence is completed. After a *OPC command is executed, the OPC bit of the
Standard Event register is set. Send *OPC after a query command that loads message into
output queue, and you can use the OPC bit to determine if the message is available. However,
the output queue will fill and the power supply will stop processing commands if there are too
many messages generated by the commands before the *OPC executes sequentially.
In addition, the following procedures present how to determine if a command sequence is
completed.
Clear the power supply's output queue.
Use
*CLS
to clear the event registers.
Execute
*ESE 1
to enable the operation complete bit (OPC, bit 0) in the Standard Event
register.
Send
*OPC?
and enter the result to ensue synchronization.
Execute
*OPC
as the last command sequentially after the command string you use to
program the configuration of the power supply. The operation complete bit (OPC, bit 0) is
set in the Standard Event register when the command sequence is completed.
Check the standard event bit (ESB, bit 5) in the Status Byte summary register to
determine if the command sequence is completed. The power supply will also generate a
SRQ interrupt if you configure it.