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DESCRIPTION AND OPERATION
MODULE CIRCUITRY
2 - 10
I-E96-302B
®
FSK COMMUNICATION
The FBS module can use FSK digital communication in the
field bus mode or point-to-point mode. When the microproces-
sor enables the FSK receive gate, digital signals from an FSK
style smart transmitter enter the FSK communication cir-
cuitry. Table
lists the firmware requirements for FSK com-
munications. Figure
shows that these signals pass through
a set of high and low pass filters to a voltage comparator. The
voltage comparator outputs a DC voltage that follows the fre-
quency of the input signal and shapes the signal for the decod-
ing logic. Figure
shows the decoding logic presents a
nine-bit digital word to the microprocessor. The microproces-
sor reads the incoming communication at a rate of 9600 baud.
Table 2-1. Firmware Revision
Level Requirements
Device
Revision
1
BCN/EQN
A16
IMFBS01
A14
IMMFC03
L.1
IMMFC04
F.1
IMMFC05
E.1
IMMFP01/02
D.1
PTS
All
Smartport
2,3
2.0
STT02
4
D10
STT02
C11
TBN580/581
B11
NOTES:
1. Firmware revision levels that are higher than those
listed also support FSK communications.
2. Smartport requires firmware revision E.1 in
IMMFP01/02/03.
3. Smartport is not supported by IMMFC03/04/05.
4. STT02 models include the E, F and S models.
These are English, French and Spanish versions.
Figure 2-7. FSK Communication Circuitry
FSK
COMMUNICATION
INPUT
LOW PASS
f
1
HIGH PASS
f
0
+
–
BANDPASS FILTER
VREF
DECODING
CIRCUIT AND
MULTIPLEXER
TO
MICROPROCESSOR
TP25183A