Atmel AT90PWM2, Manual

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358
4317I–AVR–01/08
AT90PWM2/3/2B/3B
15.3 Timer/Counter Clock Sources .......................................................................108
15.4 Counter Unit ..................................................................................................109
15.5 Input Capture Unit .........................................................................................110
15.6 Output Compare Units ...................................................................................111
15.7 Compare Match Output Unit ..........................................................................113
15.8 Modes of Operation .......................................................................................114
15.9 Timer/Counter Timing Diagrams ...................................................................122
15.10 16-bit Timer/Counter Register Description ....................................................123
16 Power Stage Controller – (PSC0, PSC1 & PSC2) .............................. 130
16.1 Features ........................................................................................................130
16.2 Overview ........................................................................................................130
16.3 PSC Description ............................................................................................131
16.4 Signal Description ..........................................................................................133
16.5 Functional Description ...................................................................................135
16.6 Update of Values ...........................................................................................140
16.7 Enhanced Resolution ....................................................................................140
16.8 PSC Inputs ....................................................................................................144
16.9 PSC Input Mode 1: Stop signal, Jump to Opposite Dead-Time and Wait .....149
16.10 PSC Input Mode 2: Stop signal, Execute Opposite Dead-Time and Wait .....150
16.11 PSC Input Mode 3: Stop signal, Execute Opposite while Fault active ..........151
16.12 PSC Input Mode 4: Deactivate outputs without changing timing. ..................151
16.13 PSC Input Mode 5: Stop signal and Insert Dead-Time ..................................152
16.14 PSC Input Mode 6: Stop signal, Jump to Opposite Dead-Time and Wait. ....153
16.15 PSC Input Mode 7: Halt PSC and Wait for Software Action ..........................153
16.16 PSC Input Mode 8: Edge Retrigger PSC .......................................................154
16.17 PSC Input Mode 9: Fixed Frequency Edge Retrigger PSC ...........................155
16.18 PSC Input Mode 14: Fixed Frequency Edge Retrigger PSC and Disactivate Out-
put 156
16.19 PSC2 Outputs ................................................................................................158
16.20 Analog Synchronization .................................................................................159
16.21 Interrupt Handling ..........................................................................................159
16.22 PSC Synchronization .....................................................................................159
16.23 PSC Clock Sources .......................................................................................160
16.24 Interrupts .......................................................................................................161
16.25 PSC Register Definition .................................................................................162
16.26 PSC2 Specific Register .................................................................................171