Artesyn Embedded Technology 6806800R89E, Assembly, Installation And Use

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SharpMedia PCIE-8120 Hardware Description
SharpMedia™ PCIE-8120 Installation and Use (6806800R89F)
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All devices on the card that provide a dedicated reset input are connected to the CPLD to allow
for individual reset control at start up or during runtime via host control. The PERST_N signal is
propagated to the Ethernet network devices (NIC, Switch, PHY) to make the card behave like a
standard NIC card. All other functions are kept in reset state and released only on S/W driver
activity to allow for correct set up before going active (i.e., Switch/PHY configuration, MFA
startup, DSP boot loading).

For additional information on CPLD, refer to Logic Design Specification PCIE-
8120 .2012.1206874M02A listed in Table "Related Specifications" on page 115 .

For timing requirements on PERST# signal, refer to PCI Express Card Electromechanica l
Specification Rev.2.0.2007.PCISIG CEM 2.04/11/2007 listed in Table "Related Specifications"
on page 115 .
B.3 Power Supply Architecture
The following figure provides an overview of the Power Supply Architecture of SharpMedia
PCIE-8120.
Figure B-5 Board Power Supply Architecture
V1P0_DSP_A @ 30 A
DC
DC
V1P0_DSP_B @ 30 A
DC
DC
V1P5_DSP_A @ 4.0 A
DC
DC
V1P5_DSP_B @ 4.0 A
DC
DC
V1P2_DSP @ 5.0 A
DC
DC
V2P5_DSP @ 4.0 A
DC
DC
V3P3_DSP @ 3.0 A
DC
DC
12V main supply
12V
LDO
V1P8_ETH @ 0.1 A
5
PWRENABLE
PWRGOOD
5
PCIe x
4
card
edge
3.3V
150W-ATX connector
12V
Assembly
option
12V -
UVLO
VP12_FAIL
U/I/P-
Monitor
PVT_I2C_bus, ALERT_N