AMD SP5100 Databook
44409 Rev. 1.70 October 10
62
System Clock Specifications
9 System Clock Specifications
9.1
System Clock Descriptions and Frequency Specifications
Table 9-1 to Table 9-3 list the SP5100 Clock description and frequency specifications.
Table 9-1: SP5100 System Clock Descriptions
Clock Domain
Frequency
Source
Usage
PCIE_RCLKP,
PCIE_RCLKN
100MHz
Main clock generator
Reference clock for A-Link Express
and internal PLL for core logic and
ACPI timers.
SATA_X1,
SATA_X2
25MHz
25MHz Crystal
SATA Controller Reference clock
X1, X2
32kHz
32kHz Crystal
RTC reference clock
USBCLK
48MHz
48MHz OSC / 48MHZ from main
clock generator
USB Controllers and HD Audio
Reference clock
Table 9-2: SP5100 System Clock Input Frequency Specifications
Clock
Frequency
Min
Max
USBCLK
48.000 MHz
47.995 MHz
48.005 MHz
SATA_X1,
SATA_X2
25.000 MHz
24.997 MHz
25.005 MHz
PCIE_RCLKP,
PCIE_RCLKN
100.000 MHz
99.999950 (-50 PPM)
100.00005 (+ 50 PPM)
X1, X2
32kHz
32.768 KHz
Table 9-3: SP5100 System Clock Output Frequency Specifications
Clock
Frequency
Min
Max
PCICLK {5:0}
33.000 MHz
30.03 MHz
33.33 MHz
LPC CLK
33.000 MHz
30.03 MHz
33.33 MHz
RTC CLOCK
32kHz
32.768 KHz
9.2
System Clock AC Specifications
to Table 9-9
list all the AC specifications of SP5100 clocks, some at specific VIH/VIL
combinations. Figure 9-1 to Figure 9-3 below illustrate the timing labels that appear in those tables.