AMD SP5100 Databook
44409 Rev. 1.70 October 10
60
Functional Description
Table 8-5: SMI, SCI, and Wake Event Support by GPIO and General Event Pins
Pin Name
SMI
Event
SCI
Event
Wake
Event
GPIO2
X
X
X
GPM [0:9]
X
X
X
GEVENTS [2:8]
X
X
X
EXTERNAL EVENTS [0:1]
X
X
X
Table 8-6 shows the state of the GPIO and GEVENT pins in different ACPI states. Note that even if some
GPIOs are in the S5 domain, its functionality may not be maintained in the S5 state.
Table 8-6: Functionality of the General Events and GPIOs across ACPI States
GPIO / GEVENT
GPIO and G-Events Functionality across ACPI states
S0/S1
S2/S3
S4/S5
G3
EXTEVENT0#, EXTEVENT1#
GEVENT# [7:2]
Maintain state
Undefined
GPM [9:0]
Maintain state
Undefined
IMC_GPIO
§
Maintain state
Undefined
GPOC [1:0]
Maintain state
Undefined
GPOC [3:2]
Maintain state
Undefined
GPIO
[0:10,13,15;30,33:45,48:52,65]
Maintain state
Undefined
GPIO[
[11, 12 14, 31, 32, 46, 47,
53:64, 66]
Maintain state
Undefined
Notes:
*
All GPIO and GPM pins are software configurable to assume alternate functions
.
Please refer to the
GPIO section in the
AMD SP5100 Register Reference Guide
for information on how to configure the
GPIO pins to alternate functions.
§ If IMC is disabled, the IMC GPIOs maintain state in S4 and S5 only if the register field PMIO_BB[5] is
set to 1. See the
AMD SP5100 Register Reference Guide
for a more detailed description of the register.
8.12 Hardware Monitor Interface
The hardware monitor interface supports voltage sensors, fan control, and digital TSI to AM3 processors.
Pin Name
Type Voltage
Functional Description
Fan control Outputs
FANOUT0/GPIO3
I/O
3.3V (5V
Tolerance)
Fan Output 0 / GPIO 3
FANOUT1/GPIO48
I/O
3.3V (5V
Tolerance)
Fan Output 1 / GPIO 48
FANOUT2/GPIO49
I/O
3.3V (5V
Tolerance)
Fan Output 2 / GPIO 49
FANIN0/GPIO50
I/O
3.3V (5V
Tolerance)
Fan Tachometer Input 0 / GPIO 50
FANIN1/GPIO51
I/O
3.3V(5V
Tolerance)
Fan Tachometer Input 1 / GPIO 51