44409
Rev.
1.70
October 10
AMD SP5100 Databook
SP5100 Strap Information
23
Pad Name
Strap Name
Type
Description
PCI_AD27
PCI_PLL
II
Bypass PCI PLL
0 V – Bypass internal PLL clock .
Use REQ3# as A-Link bypass clock
Use GNT3# as B-Link bypass clock
3.3 V – Use internal PLL-generated PLL
CLK (
Default
)
(Internal PU of 15 k
Ω
)
PCI_AD26
ACPI_BCLK
II
Bypass ACPI_BCLK
0 V – Bypass internal generated acpi_bclk.
GNT0#
as acpi_bclk bypass clock.
3.3 V – Use internal generated acpi_bclk (
Default
)
(Internal PU of 15 k
Ω
)
PCI_AD25
IDE_PLL
II
Bypass IDE CLK
0 V – Bypass internal Ide Clk
Use GNT2# as Ide 66-MHz bypass clock.
Use REQ2# as Ide 50-MHz bypass clock.
Use REQ1# as Ide 33-MHz bypass clock.
3.3 V – Use internal PLL Ide Clk (
Default
)
(Internal PU of 15 k
Ω
).
PCI_AD24
PCIE_EEPROM
II
A-Link Express-II core strap from I2C ROM enable
0 V – Use EEPROM PCI Express straps, getting the
value from I2C EPROM.
I2C EPROM ADDRESS set to all zeroes.
Use GNT4# as SDA
Use REQ4# as SCL.
3.3 V – Use default PCI Express straps (
Default
)
(Internal PU of 15 k
Ω
)
PCI_AD23
Reserved
—
Reserved (Internal PU of 15 k
Ω
)
Table 4-3: Additional Straps
The following strap is not captured by the straps logic, but is required to make the internal RTC work
properly.
Pad Name
Strap Name
Description
RTCCLK
—
The pin should be pulled-up to S5_3.3V and a crystal should be put
on X1/X2 to enable the internal RTC. Otherwise, the internal RTC
may not function properly