CE2836
CONTROL REGISTERS DESCRIPTION
CREG0, DAC Control Register 0 (
ADRS
=hex00, default=hexA0)
FMT[1:0] Digital Serial Bus Format Select
00: - Normal or Right Justified Format.
01: -Left Justified Format.
10: - I2S Format.(default)
11: - TDM, Multi-channel Time Division Multiplex Format
NBIT[1:0]: - These two bits define the serial audio input resolution for right justified and TDM mode
00: - 16-bit resolution.
01: - 20-bit resolution.
10: - 24-bit resolution (default).
11: - 32-bit resolution.
AMUTE: - Auto-mute detection enable.
0: - Auto-mute enabled. (default)
1: - No auto-mute.
DEEMP: - Enable de-emphasis
0: - Normal. (default)
1: - enable de-emphasis.
FSMPL: - Interpolation filter selection.
These two bits are recognized only when “AUTODET” bit of the CREG1 is set to ‘0’.
0X: - 44.1 or 48K sampling.(default)
10: - 96K sampling.
11: - 192K sampling.
ADDR[3:0]
CREG0[7:0]
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Hex 00
FMT[1:0]
NBIT[1:0]
AMUTE
DEEMP
FSMPL[1:0]
Default Value
1
0
1
0
0
0
0
0
77/148
Summary of Contents for PDP42Z5TA - 42" Plasma TV
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