background image

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

OPWRSB

GPIO_1

ORESET#

OXTALI

OI RI

OPWM0

OSDA1
OSCL1
OSDA2
OSCL2

SMCE#

OSDA0

DCLK

U0RX

MCLK

U0TX

OSCL0

ASPDIF

RVREF

RDQS[0..3]

RESTUP
RESTDN

RCLK0
RCLK0#
RCLK1
RCLK1#

RA[0..13]
RBA[0..1]

RDQ[0..31]

RDQM[0..3]

RCS#
RRAS#
RCAS#
RWE#
RCKE

CVBS3

SC0

SC1

S Y1

CVBS1

S Y0

CVBS2

CVBS0

Y 0P

Y 1P
Y1 N
PB1P
PB1N

SOY1

PR1P
PR1N

Y0 N
PB0P
PB0N

SOY0

PR0P
PR0N

GP
GN
BP
BN

SOG

RP
R N

RXCB

OWRP2

PWR5V

RX0B

RX0

RX1B

RX1

RXC

RX2B

RX2

GPIO_2

GPIO_16

AO1SDATA4

I2SIN_DATA

AO1MCLK
AO1BCK
AO1LRCK

MPX1
MPX2

GPIO_0

GPIO_15

GPIO_17

AR1

AL1

OPWM1
OPWM2

GPIO_18

GPIO_10
GPIO_11

FB_IN

H SYNC
VS YNC

GPIO_13
GPIO_14

S Y2
SC2

GPIO_58
GPIO_59

GPIO_131
GPIO_132
GPIO_133

GPIO_70

GPIO_130

OPCTRL3
OPCTRL4

OPCTRL6

OPCTRL0

OPCTRL7

OPCTRL1
OPCTRL2

OPCTRL5

GPIO_[71..84]

GPIO_12

GPIO_19

AO1SDATA4

DV12

A

V

CC_

A

V

3

3

SO

G

SO

Y

0

TN0

RX

CB

OP

WM

0

PDA3

PDA5
PDA6

G

P

IO

_14

A

O

1

L

RCK

G

P

IO

_80

B

TN3

A2

N

A5

P

A1

N

A4

N

JT

AG_

T

C

K

GP

IO_

9

PDA21

PDD4

PDD2

RDQ13

RDQ9

RCLK1#

RDQS2

RDQM3

RA5

SC

1

OP

C

T

R

L

7

EXT

_

R

E

S

PDA7

SV

M

CK

2P

PDA11

RDQ18

RDQ28
RDQ29

AVC

C

_

SYSPL

L

TP

1

CV

B

S

2

AR2

OX

T

A

L

I

OI

R

I

RX

0

OS

D

A

2

OP

WM

2

G

P

IO

_13

LV

DDC

PDA0

RDQ12

RDQ0

RDQ24

C_X

R

E

G

PR

1

P

AL1

BP

DC

L

K

PDA18

G

P

IO

_74

G

P

IO

_81

A7

N

G

P

IO

_10

EXT_DATA

RA9

PR

0

N

CV

C

C

1

2

OS

C

L

0

SMC

E

#

TS

0

D

A

TA

4

TS

0

D

A

TA

3

G

P

IO

_58

G

P

IO

_72

A

V

CC_

V

P

L

L

TP

3

A1

P

GP

IO_

8

POWE#

PDA12

PDA15

PDD7

RDQ11

RDQM0

RDQ22

RDQM2

RDQ25

RCAS#

SY0

CV

B

S

1

AVCC_AADC

A

V

CC_A

DCP

LL

A

V

CC_D

M

P

L

L

OP

C

T

R

L

3

RX

C

AS

P

D

IF

AO

1

SD

AT

A4

T

S0

SYN

C

G

P

IO

_79

DA

CV

DD

DA

CFS

G

A3

N

A5

N

GP

IO_

7

GP

IO_

5

EXT_LRCK

RDQ23

RDQ27

RA2

Y1

N

SC

0

MPX1

ADAC_VCM

HS

Y

NC

TP

0

OX

T

A

L

O

OP

C

T

R

L

2

OP

C

T

R

L

5

OS

C

L

1

R

PDA1

RDQ2

RCLK1

RDQ4

RA10

RX

1B

G

P

IO

_132

T

S0

VAL

ID

TS

0

D

A

TA

7

TS

0

D

A

TA

1

G

P

IO

_75

U2RX

DA

CV

R

E

F

A7

P

PDA10

PDD5

POCE0#

RDQ8

RDQS1

RDQ19

RBA0
RBA1

PR

0

P

AVCC_ADAC

AVC

C

_

XT

AL

AD

IN

0

RX

1

RX

0B

PDA4

TS

0

D

A

TA

0

A6

P

A0

P

JT

AG_

T

M

S

PDA13

PDA16

POOE0#

EXT_BCLK

RDQ5

RDQS0

RVREF

RWE#

RA13

A

V

CC_

A

P

L

L

TN1

AVC

C

_

VAD

1

CV

B

S

0

AR1

A

V

CC_HDM

IP

L

L

U0RX

A

V

CC_H

OS

D

A

1

G

P

IO

_131

AO

1

M

C

L

K

AO

1

BC

K

T

S

0CLK

TS

0

D

A

TA

2

L

V

DDA

A3

P

JT

AG_

R

T

C

K

GP

IO_

4

RESTDN

RCLK0#

PB1

P

PR

1

N

V

SYN

C

AD

IN

3

U0

T

X

RX

2B

A

V

CC_H

PV

C

C

PWR

5

V

MC

LK

PDA19

G

P

IO

_76

CK

1P

A0

N

PDA20

RESTUP

RDQ30

RDQ26

RDQ3

RA3

AVC

C

_

B2

R

P

L

L

Y1

P

SO

Y

1

Y0

P

FB

_

IN

OP

WR

S

B

A

V

CC_H

G

P

IO

_17

G

P

IO

_84

G

P

IO

_82

L

V

DDB

CK

2

N

JT

AG_

T

D

I

GP

IO_

6

PDD6

PDD1

RCLK0

RDQ14

RDQ6

RDQ1

RDQ17

RDQS3

RCS#

SY2

SY1

CV

B

S

3

MPX2

RP

OP

C

T

R

L

6

PDA8

A6

N

G

P

IO

_12

PDA9

PDD0

RDQ16

RDQ21

RDQ31

RA7

PB0

P

PB0

N

AL2

GP

GN

Y0

N

A

V

CC_H

PDA22

G

P

IO

_16

TS

0

D

A

TA

5

G

P

IO

_73

A2

P

GP

IO_

3

GP

IO_

1

PDD3

RDQ20

PB1

N

AVC

C

_

VAD

1

AVC

C

_

VAD

0

TN2

AVCC_ADAC

BN

AVC

C

_

PSC

AN

P

L

L

OS

D

A

0

G

P

IO

_18

G

P

IO

_18

G

P

IO

_15

G

P

IO

_130

G

P

IO

_59

RDQM1

RA0
RA1

SC

2

RN

AD

IN

1

AVC

C

_

SR

V

OP

C

T

R

L

0

RX

2

OS

C

L

2

PDA2

G

P

IO

_133

TS

0

D

A

TA

6

G

P

IO

_78

G

P

IO

_77

G

P

IO

_71

A4

P

GP

IO_

2

GP

IO_

0

PDA14

RDQ15

RCKE

RA11

RA8

XR

EG

VD

D

AVC

C

_

VAD

0

A

V

CC_CP

UP

LL

PWM2

VR

E

F

O

R

ESET

#

OP

C

T

R

L

1

OP

C

T

R

L

4

OP

WM

1

G

P

IO

_70

G

P

IO

_20

G

P

IO

_19

AO

1

SD

AT

A0

G

P

IO

_83

CK

1

N

JT

AG_

T

D

O

JT

AG_

R

ST

#

G

P

IO

_11

PDA17

EXT_MCLK

RDQ10

RDQ7

RVREF

RRAS#

RA6

RA4

RA12

AO

1

SD

AT

A3

AO

1

SD

AT

A1

I2S

IN_DA

T

A

U2

T

X

AVCC_VPLL

POOE0#

EXT_RES

CK1P

C_XREG

AVCC_PSCANPLL

AVCC_ADAC

TS0SYNC

A2N

LVDDC

A1P

A7N

SVM

ADIN3

B

DV33

AV12

A4N

AVCC_H

DACVDD

AGND_HDMI

PDD[0..7]

JTAG_RST#

CK2N

A1N

CK2P

AVCC_VAD0

AVCC_SYSPLL

CK1N

A5N

AGND_LVDS

PDA[0..22]

AVCC_ADCPLL

TP3

TS0VALID

DA

CV

DD

A4P

TP1

LVDDA

A0N

AVCC_APLL

JTAG_TCK

AVCC_B2RPLL

TP0

AGND_LVDS

ADAC_VCM

A3N

TN0

A6P

TN1

AVCC_SRV

TS0DATA[0..7]

TN3

AVCC_HDMIPLL

DACVREF

A6N

POCE0#

JTAG_TMS

GND

AGND_AFE

A3P

PVCC

TS0CLK

DA

CV

DD

XREGVDD

TN2

AVCC_AV33

A7P

DV26_DDR

A0P

AVCC_VAD1

JTAG_TDI

DV33SB

R

DACFS

PWM2VREF

CVCC12

AVCC_AADC

A2P

JTAG_TDO

AVCC_XTAL

G

AVCC_CPUPLL

AVSS_

APL

L

AV33

LVDDB

AGND_PLL

JTAG_RTCK

A5P

POWE#

AVCC_DMPLL

GPIO_3

GPIO_9

GPIO_15

GPIO_4

GPIO_16

DV33SB

GPIO_7

GPIO_6

GPIO_20

GPIO_8

GPIO_5

GPIO_11

GPIO_12

GPIO_10

DV33

DV33

DV26_DDR

DV12

OPWRSB

1

GPIO_1

7

ORESET#

7

OXTALI

7

OI RI

1

OPWM0

7

OSDA1

14

OSCL1

14

OSDA2

10

OSCL2

10

SMCE#

7

OSDA0

7,13

DCLK

7

U0RX

10

MCLK

7

U0TX

10

OSCL0

7,13

ASPDIF

9

RVREF

8

RESTUP

6

RESTDN

6

RCLK0

8

RCLK0#

8

RCLK1

8

RCLK1#

8

RA[0..13]

8

RBA[0..1]

8

RDQ[0..31]

8

RDQS[0..3]

8

RDQM[0..3]

8

RCS#

8

RRAS#

8

RCAS#

8

RWE#

8

RCKE

8

CVBS3

9

SC0

9

SC1

9

S Y1

9

CVBS1

9

S Y0

9

CVBS2

9

CVBS0

3

Y0P

9

Y1P

9

Y1N

9

PB1P

9

PB1N

9

SOY1

9

PR1P

9

PR1N

9

Y0N

9

PB0P

9

PB0N

9

SOY0

9

PR0P

9

PR0N

9

GP

10

GN

10

BP

10

BN

10

SOG

10

RP

10

RN

10

RXCB

14

OWRP2

10

PWR5V

14

RX0B

14

RX0

14

RX1B

14

RX1

14

RXC

14

RX2B

14

RX2

14

GPIO_2

14

GPIO_16

7,13

AO1SDATA4

11

I2SIN_DATA

11

AO1MCLK

11

AO1BCK

11

AO1LRCK

11

MPX1

3

MPX2

3

GPIO_0

4

GPIO_15

6,7

GPIO_17

7

AR1

11

AL1

11

OPWM1

13

OPWM2

GPIO_18

4

GPIO_10

12

GPIO_11

6,7

FB_IN

10

H SYNC

10

VS YNC

10

GPIO_13

13

GPIO_14

13

SC2

9

S Y2

9

GPIO_58
GPIO_59

GPIO_131

1

GPIO_132

1

GPIO_133

1

GPIO_70

1

GPIO_130

1

OPCTRL3

12

OPCTRL4

1,13

OPCTRL6

7

OPCTRL0

1

OPCTRL7

7

OPCTRL1

1

OPCTRL2

1

OPCTRL5

13

GPIO_[71..84]

1

GPIO_12

6,7

GPIO_19

11

AO1SDATA4

11

DV12

2,6

ADIN3

3

A1P

13

AVCC_ADAC

6,13

AVCC_CPUPLL

2,6

AVCC_AADC

6

XREGVDD

1,2,6,7,10,11,12,13,14

A5P

13

SVM

13

PWM2VREF

6

A1N

13

A0P

13

AGND_PLL

1,2,3,4,6,7,8,9,10,11,12,13,14

CK1N

13

A0N

13

PDD[0..7]

7

TS0VALID

4

A2N

13

LVDDC

6

AVCC_APLL

2,6

AGND_AFE

1,2,3,4,6,7,8,9,10,11,12,13,14

TN2

6

POCE0#

7

CVCC12

6

AVCC_SRV

1,2,6,7,10,11,12,13,14

AVCC_B2RPLL

2,6

AVCC_DMPLL

2,6

TN3

6

JTAG_TDO

7

CK2N

13

DACVDD

6

AVCC_VAD1

6

TS0SYNC

4

LVDDA

6

TP3

6

R

13

GND

1,2,3,4,6,7,8,9,10,11,12,13,14

TP0

6

AVCC_VAD0

6

ADAC_VCM

6

JTAG_TMS

7

AVCC_HDMIPLL

2,6

A7N

13

A4P

13

PDA[0..22]

7

AVCC_AV33

6

C_XREG

6

A4N

13

JTAG_TCK

7

AVCC_VPLL

6

DV33

1,2,4,6,7,11,12,13

A3N

13

AVCC_SYSPLL

2,6

DV33SB

1,2,6,7,10,11,12,13,14

A6P

13

JTAG_RST#

7

A5N

13

A3P

13

B

13

DV26_DDR

2,6,8

TN0

6

AGND_LVDS

1,2,3,4,6,7,8,9,10,11,12,13,14

EXT_RES

6

TP1

6

TN1

6

DACFS

6

A2P

13

LVDDB

6

AGND_LVDS

1,2,3,4,6,7,8,9,10,11,12,13,14

AVCC_XTAL

1,2,6,7,10,11,12,13,14

G

13

A7P

13

TSCLK

4

AV33

2,6,10,11,14

POOE0#

7

DACVREF

6

A6N

13

CK2P

13

AVCC_ADCPLL

2,6

AGND_HDMI

1,2,3,4,6,7,8,9,10,11,12,13,14

JTAG_RTCK

7

POWE#

7

AVCC_H

6

CK1P

13

AVCC_PSCANPLL

2,6

PVCC

6

JTAG_TDI

7

AV12

2,6

TS0DATA[0..7]

4

GPIO_4

6,14

GPIO_5

6,14

GPIO_9

6

GPIO_8

10,14

GPIO_16

7,13

GPIO_7

6

GPIO_20

6

GPIO_15

6,7

GPIO_3

6,14

GPIO_6

6

DV33SB

1,2,6,7,10,11,12,13,14

GPIO_11

6,7

GPIO_12

6,7

GPIO_10

12

Title

Size

Document Number

R e v

Date:

Sheet

o f

ZhongShan KAWA Electronic Inc.

 

 

Drawn:

Checked:

MT5372 ASIC

2

Custom

5

14

Friday, December 29, 2006

MT5371_V07

<D e signer>

<Checker>

DDR SIGNAL

AV / SV VIDEO INPUT

YPBPR VIDEO INPUT

VGA VIDEO INPUT

HDMI VIDEO INPUT

AUDIO I2S INTERFACE

INTERNAL AUDIO DAC OUTPUT

RESERVE HEAT-SINK SPACE

HDMI POWER

GLOBAL POWER

TS INPUT

NOR FLASH

CRT OUTPUT

PLL POWER

LVDS SIGNAL

ANALOG FRONT-END POWER

JTAG

LVDS POWER

VIDEO DAC POWER

TP

2

8

MT537

1

GPIO

JTAG

LVDS

VIDEO DAC

UART

AUDIO OUTPUT

TS INPUT

IEEE 1394 PHY I/O

DDR DRAM

NAND FLASH/NOR FLASH

POD

OUT

ATA/CF/MS/SD/XD

SDIO

SIF

PWM

IR

HDMI RX

PWR

SERVO ADC 

 INPUT

DIGITAL VIDEO

INPUT

ANALOG VIDEO INPUT

AUDIO

ADC

AUDIO

DAC

U12

MT5372

BGA588

RA13

A1

RA1

A2

RA5

A3

RA9

A4

RA12

A5

RA8

B1

RA11

B2

RA10

B3

RA3

B4

RA7

B5

RA4

C1

RA6

C2

RBA1

C3

RRAS_

C4

RCAS_

C5

RA0

D1

RA2

D2

RWE_

D3

RBA0

D4

RCS_

D5

RCKE

E1

RODT

E2

RDQ4

E3

RDQ3

E4

RDQ29

A6

RDQ26

B6

RDQ24

C6

RDQ31

D6

RDQS3_

A7

RDQS3

B7

RDQM3

C7

RDQ30

D7

RDQ25

A8

RDQ27

B8

RDQ28

C8

RVREF

D8

RDQ21

A9

RDQ18

B9

RDQ16

C9

RDQ23

D9

RDQS2_

A10

RDQS2

B10

RDQM2

C10

RDQ22

D10

RCLK1

A11

RCLK1_

B11

RDQ17

C11

RDQ19

D11

RDQ20

A12

RDQ1

F1

RDQ6

F2

RDQM0

F3

RVREF

F4

RDQS0

G1

RDQS0_

G2

RDQ7

G3

RDQ0

G4

RDQ2

H1

RDQ5

H2

RDQ12

H3

RDQ11

H4

RDQ9

J1

RDQ14

J2

RDQS1_

J3

RDQS1

J4

RDQM1

K1

RDQ15

K2

RDQ8

K3

RDQ10

K4

RCLK0

L1

RCLK0_

L2

RDQ13

L3

REXTUP

L4

REXTDN

M1

PDCD1_

M2

PDCE1_

M3

PDCE2_

M4

PDVS1

N1

PDOE_

N2

PDIORD_

N3

PDIOWR_

N4

PDWE_

P1

PDIREQ_

P2

PDCTRLVPP

P3

PDVS2

P4

PDREST

R1

PDWAIT_

R2

PDINPACK_

R3

PDREG_

R4

PDIOIS16_

T1

PDCD2_

T2

PDENPOD

T3

POCE2_

T4

POCE1_

U1

POOE0_

U2

POCE0_

U3

PDA1

U4

PDD0

V1

PDD1

V2

PDD2

V3

PDD3

V4

PDD4

W1

PDD5

W2

PDD6

W3

PDD7

W4

PDA0

Y1

PDA17

Y2

PDA16

Y3

PDA15

Y4

PDA14

AA1

PDA13

AA2

PDA12

AA3

PDA11

AA4

PDA10

AB1

PDA9

AB2

PDA20

AB3

PDA21

AB4

POWE_

AC1

GP

IO_

0

B1

2

GP

IO_

1

C12

GP

IO_

2

D12

GP

IO_

3

A1

3

GP

IO_

4

B1

3

GP

IO_

5

C13

GP

IO_

6

D13

GP

IO_

7

A1

4

GP

IO_

8

B1

4

GP

IO_

9

C14

G

P

IO

_10

D14

G

P

IO

_11

A1

5

G

P

IO

_12

B1

5

JT

R

S

T

_

C15

JT

D

I

D15

JT

D

O

A1

6

JR

T

C

K

B1

6

JT

M

S

C16

JT

C

K

D16

LV

S

S

A

D23

A0

P

A1

7

A0

N

B1

7

A4

P

C17

A4

N

D17

A1

P

A1

8

A1

N

B1

8

A5

P

C18

A5

N

D18

A2

P

A1

9

A2

N

B1

9

A6

P

C19

A6

N

D19

CK

1P

A2

0

CK

1N

B2

0

CK

2P

C20

CK

2N

D20

A3

P

A2

1

A3

N

B2

1

A7

P

C21

A7

N

D21

LV

DDB

A2

2

LV

DDC

B2

2

LV

S

S

B

C22

L

VSSC

D22

TP

3

A2

3

TN3

B2

3

LV

DDA

C23

AVSS_

VPL

L

D24

DA

CV

RE

F

A2

4

AVC

C

_

VPL

L

B2

4

DA

CV

S

S

B

D25

D

AC

VSSC

C24

R

A2

5

G

A2

6

B

A2

7

SVM

A2

8

FS

B2

5

DA

CV

DDC

B2

6

DA

CV

DDB

B2

7

DA

CV

DDA

B2

8

DA

CV

S

S

A

C25

E

CNTL0

D28

EL

R

EQ

A2

9

EC

L

K

A3

0

EL

PS

C28

E

CNTL1

E2

8

ED

AT

A0

B2

9

ED

AT

A1

B3

0

U2RX

C27

EL

IN

KO

N

E2

7

ED

AT

A2

C29

ED

AT

A3

C30

U2TX

D27

U2CTS

C26

ED

AT

A4

D29

ED

AT

A5

D30

T0

DA

TA

0

F3

0

U2RTS

D26

ED

AT

A6

E2

9

ED

AT

A7

E3

0

T0

DA

TA

1

G3

0

T0

DA

TA

2

F2

7

T0

DA

TA

3

F2

8

T0

DA

TA

4

F2

9

T0

DA

TA

5

H30

T0

DA

TA

6

G2

7

T0

DA

TA

7

G2

8

T

0

SYN

C

G2

9

A

O

LRCK

J3

0

AO

SD

AT

A0

H27

T

0

VAL

ID

H28

T0

CL

K

H29

AO

SD

AT

A1

K3

0

AO

SD

AT

A2

J2

7

AO

BC

K

J2

8

AO

MC

L

K

J2

9

AO

SD

AT

A3

L30

AO

SD

AT

A4

K2

7

AO

2

BC

K

K2

8

AO

2

M

C

L

K

K2

9

A

O

2LRCK

M30

AO

2

SD

AT

A0

L27

AL

IN

L28

ASPD

IF

L29

G

P

IO

_13

N27

G

P

IO

_14

M27

G

P

IO

_15

M28

G

P

IO

_16

M29

G

P

IO

_17

U27

G

P

IO

_18

T2

7

G

P

IO

_19

R27

G

P

IO

_20

P2

7

PDA22

AC2

PDA19

AC3

PDA18

AC4

PDA8

AD1

PDA7

AD2

PDA6

AD3

PDA5

AD4

PDA4

AE1

PDA3

AE2

PDA2

AE3

IDD8

AE4

IIO

RDY

AF

1

IDD9

AF

2

IDD10

AF

3

IDD11

AF

4

IINTRQ

AJ2

IDD12

AG

1

IDD13

AG

2

IDIO

W

_

AH

2

IDA

1

AJ1

IDD14

AG

3

IDD15

AG

4

IDIO

R_

AH

1

IDA

2

AH

3

IDA

0

AJ3

ICS

1

_

AK3

ICS

0

_

AK2

IR

ESET

_

AK1

SMC

E

_

AK5

SD

IO

C

M

D

AH

4

SD

IO

D

0

AJ4

SD

IO

C

L

K

AK4

MD

AT

A1

AK6

MD

AT

A0

AG

5

DCLK

AH

5

MC

LK

AJ5

SD

IO

D

1

AK7

SD

IO

D

2

AG

6

SD

IO

D

3

AH

6

OI

R

O

AJ6

OP

WM

2

AK8

OP

WM

1

AG

7

OP

WM

0

AH

7

PWR

5

V

AJ7

OS

C

L

1

AK9

OS

D

A

1

AG

8

OS

D

A

0

AH

8

OS

C

L

0

AJ8

OWR

P

2

AG

9

OS

C

L

2

AH

9

OS

D

A

2

AJ9

PG

N

D

AG

1

0

PVC

C

AH

1

0

CV

CC12

AJ1

0

EXT

_

R

ES

AK1

0

AVSS_

H

C

AG

1

1

A

V

CC_HC

AH

1

1

RX

CB

AJ1

1

RX

C

AK1

1

AVSS_

H

0

AG

1

2

A

V

CC_H0

AH

1

2

RX

0B

AJ1

2

RX

0

AK1

2

AVSS_

H

1

AG

1

3

A

V

CC_H1

AH

1

3

RX

1B

AJ1

3

RX

1

AK1

3

AVSS_

H

2

AG

1

4

A

V

CC_H2

AH

1

4

RX

2B

AJ1

4

RX

2

AK1

4

O

P

CTRL4

AG

1

5

O

P

CTRL5

AH

1

5

O

P

CTRL6

AJ1

5

O

P

CTRL7

AK1

5

O

P

CTRL0

AG

1

6

O

P

CTRL1

AH

1

6

O

P

CTRL2

AJ1

6

O

P

CTRL3

AK1

6

U0RX

AG

1

7

O

R

ESET

_

AH

1

7

OI

R

I

AJ1

7

OP

WR

S

B

AK1

7

U0TX

AG

1

8

A

V

CC_S

R

V

AK1

8

AD

IN

2

AG

1

9

PWM2

VR

EF

AH

1

9

AD

IN

1

AJ1

9

AD

IN

0

AK1

9

AD

IN

4

AG

2

0

AD

IN

3

AH

2

0

XT

AL

I

AJ2

0

XT

AL

O

AK2

0

AVSS_

SR

V

AH

2

1

AVSS_

XT

AL

AJ2

1

AVC

C

_

XT

AL

AK2

1

VI

D

7

AG

2

1

VI

D

3

AG

2

2

VI

D

4

AH

2

2

VI

D

5

AJ2

2

VI

D

6

AK2

2

VI

D

0

AH

2

3

VI

D

1

AJ2

3

VI

D

2

AK2

3

VI

VC

L

K

AG

2

3

 

AVSS_

H

D

MI

PL

L

AG

2

4

 

A

V

CC_HDM

IP

L

L

AH

2

4

 

A

V

CC_P

S

CA

NP

LL

AJ2

4

 

A

V

CC_DM

P

L

L

AK2

4

 

AVSS_

PSC

AN

PL

L

AG

2

5

 

A

V

CC_CP

UP

LL

AH

2

5

TN0

AJ2

5

TP

0

AK2

5

 

AVSS_

D

M

PL

L

AG

2

6

 

A

V

CC_A

DCP

LL

AH

2

7

VSYN

C

AJ2

6

HS

Y

NC

AK2

6

SO

Y0

AJ3

0

 

AVSS_

SYSPL

L

AE2

7

SO

G

AJ2

9

FB

_

IN

AH

2

6

Y0

N

AH

2

9

RN

AK2

9

GN

AJ2

8

BN

AJ2

7

Y0

P

AH

3

0

RP

AK3

0

GP

AK2

8

BP

AK2

7

 

AVSS0_ADAC

N28

 

AVSS1_ADAC

N29

 

AVCC1_ADAC

N30

ADAC_VCM

P28

AR2

P29

AL2

P30

 

AVCC0_ADAC

R28

AR1

R29

AL1

R30

 

AVSS_AADC

T28

 

AVCC_AADC

U28

MPX2

T29

MPX1

T30

TN2

U29

TP

2

U30

 

AVSS_

VF

E0

V2

7

 

AVC

C

_

VF

E0

V2

8

C

VBS1

V2

9

C

VBS0

V3

0

 

AVSS_

VAD

0

W2

7

 

A

V

CC_V

A

D0

W2

8

C

VBS3

W2

9

C

VBS2

W3

0

 

AVSS_

VAD

1

Y2

7

 

A

V

CC_V

A

D1

Y2

8

SC

0

Y2

9

SY0

Y3

0

 

AVSS_

VF

E1

AA2

7

 

AVC

C

_

VF

E1

AA2

8

SC

1

AA2

9

SY1

AA3

0

 

AVSS_

AV3

3

AB2

7

 

A

V

CC_A

V

33

AB2

8

SC

2

AB2

9

SY2

AB3

0

TN1

AC

2

7

TP

1

AC

2

8

PR

1

N

AC

2

9

PR

1

P

AC

3

0

PB1

N

AD

2

9

PB1

P

AD

3

0

SO

Y1

AE2

8

Y1

N

AE2

9

Y1

P

AE3

0

PR

0

N

AF

2

9

PR

0

P

AF

3

0

PB0

N

AG

2

9

PB0

P

AG

3

0

V

CC2IO

E7

V

CC2IO

E8

V

CC2IO

E9

V

CC2IO

E1

0

V

CC2IO

E1

1

V

CC2IO

E1

2

V

CC2IO

F5

V

CC2IO

F6

V

CC2IO

F8

V

CC2IO

F9

V

CC2IO

F1

0

V

CC2IO

F1

1

V

CC2IO

F1

2

V

CC2IO

G5

V

CC2IO

H5

V

CC2IO

H6

V

CC2IO

J5

V

CC2IO

J6

V

CC2IO

K5

V

CC2IO

K6

V

CC2IO

L5

V

CC2IO

L6

V

CC2IO

M5

V

CC2IO

M6

V

CC2IO

E5

V

CC2IO

E6

V

CC2IO

F7

V

CC2IO

G6

V

CC3IO

N5

V

CC3IO

N6

V

CC3IO

P5

V

CC3IO

P6

V

CC3IO

R5

V

CC3IO

R6

V

CC3IO

E1

6

V

CC3IO

E1

7

V

CC3IO

E1

8

V

CC3IO

F1

6

V

CC3IO

F1

7

V

CC3IO

F1

8

VCCK

F13

VCCK

F14

VCCK

F15

VCCK

E13

VCCK

E14

VCCK

E15

VCCK

T5

VCCK

T6

VCCK

U5

VCCK

U6

VCCK

V5

VCCK

V6

VCCK

F26

VCCK

G26

VCCK

H26

VCCK

J26

VCCK

K26

VCCK

AF15

VCCK

AF16

VCCK

AF17

V

CC3IO

L26

V

CC3IO

M26

V

CC3IO

N26

V

CC3IO

P2

6

V

CC3IO

AF

6

V

CC3IO

AF

7

C

_

XR

EG

AJ1

8

XR

EG

VSS

AF

1

8

XR

EG

VD

D

AH

1

8

AVCC_DV33

R26

AVSS_

C

PU

PL

L

AG

2

7

AVSS_

AD

C

PL

L

AF

2

7

AVSS_

B2

R

PL

L

AD

2

7

AVSS_

APL

L

AD

2

8

A

V

CC_A

P

LL

AF

2

8

A

V

CC_B

2

RP

LL

AG

2

8

AVC

C

_

SYSPL

L

AH

2

8

V

CC3IO

AF

8

V

CC3IO

AF

9

VCCK

AF19

VCCK

AF20

GND

L11

GND

L12

GND

L13

GND

L14

GND

L15

GND

L16

GND

L17

GND

L18

GND

L19

GND

L20

GND

M11

GND

M12

GND

M13

GND

M14

GND

M15

GND

M16

GND

M17

GND

M18

GND

M19

GND

M20

GND

N11

GND

N12

GND

N13

GND

N14

GND

N15

GND

N16

GND

N17

GND

N18

GND

N19

GND

N20

GND

P11

GND

P12

GND

P13

GND

P14

GND

P15

GND

P16

GND

P17

GND

P18

GND

P19

GND

P20

GND

R11

GND

R12

GND

R13

GND

R14

GND

R15

GND

R16

GND

R17

GND

R18

GND

R19

GND

R20

GND

T11

GND

T12

GND

T13

GND

T14

GND

T15

GND

T16

GND

T17

GND

T18

GND

T19

GND

T20

GND

U11

GND

U12

GND

U13

GND

U14

GND

U15

GND

U16

GND

U17

GND

U18

GND

U19

GND

U20

GND

V11

GND

V12

GND

V13

GND

V14

GND

V15

GND

V16

GND

V17

GND

V18

GND

V19

GND

V20

GND

W11

GND

W12

GND

W13

GND

W14

GND

W15

GND

W16

GND

W17

GND

W18

GND

W19

GND

W20

GND

Y11

GND

Y12

GND

Y13

GND

Y14

GND

Y15

GND

Y16

GND

Y17

GND

Y18

GND

Y19

GND

Y20

TP41

TP

3

5

TP

2

0

TP

3

2

TP

1

7

TP

2

3

TP37

TP

2

5

TP

2

9

TP40

TP

6

TP

3

6

TP

2

1

TP

2

6

TP39

TP

3

3

TP

4

4

TP

3

0

TP43

TP

2

7

TP

4

5

TP

3

4

TP

4

6

TP

2

4

TP

2

2

TP

3

1

TP38

13/148

Summary of Contents for PDP42Z5TA - 42" Plasma TV

Page 1: ......

Page 2: ...s Circuit Description 23 26 6 Main IC Information 27 98 7 Panel Information 99 133 8 Exploded View 134 9 Spare Part List 135 138 10 If you forget your V Chip Password 139 11 Software Upgrade 140 148 T...

Page 3: ...f electric shock to persons The exclamation point within an equilateral triangle is intended to alert the user to the presence of important operating and maintenance servicing instructions in the lite...

Page 4: ...from high voltage or high tempera ture components 8 Before returning the set to the customer always perform an AC leakage current check on the exposed metallic parts of the cabinet such as antennas t...

Page 5: ...the connector J2 J11 If not please connect the direction whether is wrong or the main board somewhere of power short circuit 3 The power is normal worked but doesn t show screen 3 1 The indicator lig...

Page 6: ...as R G B 3 color cells Pixel Dot Pitch 0 900 H x 0 676 V mm Color 1073 7 millions of colors R G B each 1024 scales Gray Scale 1024 R G B each 10 bit Brightness Peak Value 1200cd m2 Contrast Dark Room...

Page 7: ...Frequency KHz Vertical Frequency Hz 640 x 480 31 50 60 00 800 x 600 35 16 56 25 37 90 60 32 48 08 72 19 1024 x 768 48 40 60 00 Resolution Horizontal Frequency KHz Vertical Frequency Hz 480i 15 734 59...

Page 8: ...ze the picture press again to restore the picture This button is inactive for VGA mode DTV Press to choose TV DTV high de nition channels directly F2 Digital TV Timetable Press to display the Digital...

Page 9: ...YPbPr2 Option VGA AV S Video Audio X5 CE2836 Audio ADC DAC 10Bit LVDS Flash 32M DDR 256M DDR 256M R2S15102 Class D Amplifier Max232 Level Shift RS232 Socket Speaker PDP panel POWER BOARD 5V Standby 5V...

Page 10: ...PSU B D Parts position SDM U B D YSUS B D Keypad B D ABUS Left Main B D Logic B D behind the Main B D Remote control receiver External speaker EMI Filter AC Inlet XBUS B D XSUS B D ABUS Right 8 148...

Page 11: ...V POWER 3 3V POWER 1 6V POWER 3 3V POWER 3 3V POWER 1 8V POWER 1 5V POWER 1 2V POWER 1 2V STANDBY POWER TUNER POWER MT5112 POWER AND ITS PERIPHERAL MT5112 POWER MT5372 POWER AND ITS PERIPHERAL MT5372...

Page 12: ...R SANRE CB37 4 7uF 6 3V C0603 SMD CE4 220uF 16V 100UF 220UF SMD CB28 0 1uF C0603 SMD CB46 0 1uF C0603 SMD L14 FB 70R 500mA 0603 BEAD SMD 0603 L17 FB 75R 1A 0805 BEAD SMD 0805 CB20 0 1uF C0603 SMD CB39...

Page 13: ...NC R0603 SMD R52 0R NC R0603 SMD R54 10 R0603 SMD R53 100K R0603 SMD R404 0 R0603 SMD CB49 0 1uF NC C0603 SMD QF2 2N7002 NC SOT23 SMD 1 3 2 R51 0R NC R0603 SMD R60 10 R0603 SMD CB61 NC C0603 SMD R67...

Page 14: ...AVDD5 12 NC 13 NC 14 ADVDD33 15 DGND33 16 DVDD33 17 DVDD18 18 DGND18 19 NC 20 GPIO0 P1 0 21 TS_DATA7 22 TS_DATA6 23 TS_DATA5 24 TS_DATA4 25 DVDD33 26 DGND33 27 TS_DATA3 28 TS_DATA2 29 DVDD18 30 DGND1...

Page 15: ...RVE HEAT SINK SPACE HDMI POWER GLOBAL POWER TS INPUT NOR FLASH CRT OUTPUT PLL POWER LVDS SIGNAL ANALOG FRONT END POWER JTAG LVDS POWER VIDEO DAC POWER TP28 MT5371 GPIO JTAG LVDS VIDEO DAC UART AUDIO O...

Page 16: ...IGHT SIDE TOP SIDE BOTTOM SIDE LEFT SIDE RIGHT SIDE STANDBY POWER DIGITAL POWER HDMI POWER ANALOG FRONT END POWER HDMI POWER RA V1 RA V2 L42 FB 70R 500mA 0603 BEAD SMD 0603 TP48 CB162 0 1uF C0603 SMD...

Page 17: ...F 16v 100UF 220UF SMD CB186 47pF C0603 SMD R81 10K R0603 SMD CE38 10uF 16V 10UF SMD U28A 74HC00 74HC00 1 2 3 14 7 R100 4 7K R0603 SMD CB190 0 1uF C0603 SMD CB185 1nF C0603 SMD R99 10K R0603 SMD CB191...

Page 18: ...2 220uF 16V 100UF 220UF SMD CB199 0 1uF C0603 SMD CB244 0 1uF C0603 SMD CB250 0 1uF C0603 SMD CB268 0 1uF C0603 SMD R139 47 R0603 SMD R130 NS 75 R0603 SMD CB284 0 1uF C0603 SMD CB274 0 1uF C0603 SMD R...

Page 19: ...CB325 47pF C0603 SMD CB286 1nF C0603 SMD D14 BAV99 SOT23 SMD 1 3 2 CB307 330pF C0603 SMD CB336 220P C0603 SMD P3 RCA3X2 AV6 8 4 13B 3 4 2 1 5 6 7 8 9 10 CB290 NC C0603 SMD CB324 NC C0603 SMD CB314 15p...

Page 20: ...DEL R214_R219_R215_R213_U21_R225_R226 DEL D17 D27_D60_P5_U20_Q10_Q19_CB340 DEL R36_RR82_R83_R208_R209_R210_R211_R212_R216_R217_R218_R390_R408 2006 12 16 2006 12 16 2006 12 16 DEL CB339_R203_R206_R207...

Page 21: ...B466 4 7uF 6 3V C0603 SMD CE50 47uF 16V 100UF 220UF SMD CE47 100uF 16V 100UF 220UF SMD CE53 470uF 16V R248 20K R0603 SMD R267 10K NC R0603 SMD R281 100 R0603 SMD R264 1K NC R0603 SMD RN31 33x4 RN0603...

Page 22: ...3 SMD CB426 0 1uF 50V C0603 SMD CE55 1000uF 35v CAP7X16 5 R308 47K R0603 SMD CB418 0 1uF 50V C0603 SMD L68 BEAD 15UH DIP L DIP P5 0 D10 5 CB420 3pF C0603 SMD R316 NC R1206 SMD CB424 0 1uF 50V C0603 SM...

Page 23: ...ustom 13 14 Friday December 29 2006 MT5371_V07 Designer Checker CRT OUTPUT LVDS SIGNAL FOR DEBUG PURPOSE CPUGO PDPGO INPUT TO PDP IRQ READY PDP INPUT TO MT8202 LO LVDS POWER OFF HI LVDS POWER ON LVDS...

Page 24: ...K R435 0R R426 10K NC R438 4 7K CB440 0 1uF P8 HDMI RX2 1 RX2 3 GND 5 RX0 7 RX0 9 GND 11 CEC 13 SCL 15 GND 2 RX1 6 GND 8 RXC 10 NC 14 RX1 4 RXC 12 SDA 16 GND 20 GND 22 GND 17 DET 19 5V 18 GND 21 GND 2...

Page 25: ...rd 1 pcs XBUS board 1 pcs SDM U board 1 pcs SDM D board 2 pcs ABUS L and R board 1 pcs Logic Signal Input board and 1 pcs PSU board in the Module SET There are 5 pcs PCBs including 1 pcs Main board 1...

Page 26: ...ill send ON Control signals to Power Then Sub PSU sends 5Vsc 9Vsc 24V to PCBs working This time Logic Board will send signals to Panel by X Y SUS Board OSD on the panel and display available signal If...

Page 27: ...nes and to transmit to Control board 3 Logic board Dealing with the digital signal for output to panel 4 Y Sustainer X Sustainer board 1 Receiving the signals from Logic and high voltage supply 2 Outp...

Page 28: ...ith signals output and OSD d Abnormal noise on screen 3 PSU and Sub PSU No picture no power output 4 X Sustainer a No picture b Color not enough c Flash on screen 5 Y Sustainer Darker picture with sig...

Page 29: ...Main IC Specifications MT537x Application Note MT5112BD CE2836 24 bit 192KHz CODEC 6 ch DAC 5 Input Mux Stereo ADC R2S15102NP Digital Power Amplifier R2S15102NP 27 148...

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Page 67: ...tion to ease the recording applications FEATURES Six Channel Audio DAC 104 dB SNR A Weighted 82 dB THD N Ratio A Weighted 32K 192 KHz Sampling Rates On chip Reconstruction Filters Independent Digital...

Page 68: ...ation 92 dB 7 Nonlinear Distortion 0 25 dB 8 Channel Gain Error 0 1 dB ADC PERFORMANCE SPECIFICATIONS 1 Maximum Input Level 4 Vpp 2 0 dB Audio Input Level 1 Vrms 3 Audio Bandwidth 20Hz 20 KHz 0 5 dB 4...

Page 69: ...e users don t need to set the SRC registers However in the master mode operation the users need to set the SCR registers for the serial audio clock generations Table 1 Sampling Rate DAC XCK Requiremen...

Page 70: ...10 768 fs 00 512fs 48 K XCK Freq 18 432 MHz 12 288 Mhz 36 864 MHz 24 576 Mhz SRC 1 0 10 384 fs 00 256 fs 10 768fs 00 512 fs 96 K XCK Freq 18 432 MHz 12 288 Mhz 36 864 MHz 24 576 Mhz SRC 1 0 11 192 fs...

Page 71: ...to Figure 1 PCM data format for its definition Input default if DAC I F is configured to be slave else it is an output DIN1 1 I DAC Channel 1 or TDM serial audio data input DIN2 2 I DAC Channel 2 ser...

Page 72: ...4 No connection It can be tied to AGND AINR4 15 I ADC channel 4 right input Input resistance is 20K Ohm AINL4 16 I ADC channel 4 left input Input resistance is 20K Ohm AINR3 17 I ADC channel 3 right i...

Page 73: ...g left channel 1 output AOR1 36 O Analog right channel 1 output DAVCM 37 O DAC comment mode voltage It should be connected to a 22 uF in parallel with a 0 1 uF decoupling capacitors to ground Signal l...

Page 74: ...t MSB first numbers The CE2836 supports four resolution which are selected programming the control register CREG0 and CRFEGA via the I2C serial control port Table 3 describes these four resolution The...

Page 75: ...nel right channel 1 2 3 LSB MSB 1 2 3 LSB MSB left Channel right channel 1 2 LSB MSB Channel 0 Channel 1 Last Channel 1 2 3 LSB MSB 1 2 LSB MSB data 0 3 n n n n n Right Justified Input Format Left Jus...

Page 76: ...ation ADC Gain and ALC Each channel of ADC input includes a Analog Gain The Gain is controlled by CREGC ADC Gain Selection The gain range is from 6 dB to 9 dB with 1 dB step The GAIN 9 corresponds to...

Page 77: ...is the acknowledges generated by CE2836 The first byte is the 7 bit Chip Address followed by the read write bit read is high write is low The second byte is the control register address The third byte...

Page 78: ...Control Register for DAC channel 1 left 3 CREG3 7 0 80 Volume Control Register for DAC channel 1 right 4 CREG4 7 0 80 Volume Control Registerl for DAC channel 2 left 5 CREG5 7 0 80 Volume Control Reg...

Page 79: ...de 00 16 bit resolution 01 20 bit resolution 10 24 bit resolution default 11 32 bit resolution AMUTE Auto mute detection enable 0 Auto mute enabled default 1 No auto mute DEEMP Enable de emphasis 0 No...

Page 80: ...XCK 256 11 Sampling Rate XCK 384 CKDIV2 Enable the ADXCK Clock divided by 2 0 DAC system clock is DAXCK default 1 DAC system clock is DAXCK 2 MUTE56 Mute control for channels 5 and 6 0 do not mute ch...

Page 81: ...n 80h ADDR 3 0 Volume Registers BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 Hex 02 Channel 1 left volume register VOLREGL1 7 0 Hex 03 Channel 1 right volume register VOLREGR1 7 0 Hex 04 Channel 2...

Page 82: ...0 78dB 11 84 dB ALCHTM Automatic Level Control Hold time 0 340 ms default For music program 1 5 3 ms This should be used for speech conversion ALCEN Enable Automatic Level Control Function 0 Disable A...

Page 83: ...16 bit resolution 01 20 bit resolution 10 24 bit resolution default 11 32 bit resolution SRC 1 0 ADC Sampling Rate Selection It is used in the ADC Master Mode CRA 1 1 to generate ADFS and ADBCK 00 Sam...

Page 84: ...lave Mode 1 Master Mode ADPWD ADC Power Down 0 ADC enabled 1 ADC Power Down ZCBYP Disable ADC Zero Crossing Detection 0 Zero crossing is enabled 1 Zero crossing is bypassed HPFBYP Bypass ADC data path...

Page 85: ...Soft Reset ADRS hex0D default hex92 Chip Soft Reset A write of all zeros to this register will reset the chip except the Command Registers Another write of hex92 is required to enable to chip again AD...

Page 86: ...e values of 0 1 uF 2 3 3 Volt 680 ohm Over Sample Clock 30 3 3 Volt 180 Ohm DAVH 38 23 DVDD 5 6 DAVL 220 uF AGND 36 35 34 33 32 31 AINL1 AINR1 AINL2 AINR2 AINL3 AINR3 AINL4 AINR4 AINL5 AINR5 22 21 20...

Page 87: ...quency sigma delta modulator noise The filter s component values and characteristic are shown in the following figures 4 7 uF 2 7 K 10 K 10 K All resistors and capicitors are 5 precision 100 K 1000 pF...

Page 88: ...uivalent input resistance of 20K ohm To ensure the performance it is recommended that the applications should have a simple low pass filter to remove the high frequency noise 20 K 20 K VCM ADC Interna...

Page 89: ...ace Timing Requirement Figure 4 Serial Command Port Write Timing Requirement tbck H tkd su tkd hd tkr su tkr hd DIN DOUT BCK FS tbck tbck L SCL SDA tBF tHD sta tHD dat tSU dat tSU sta tSU stp tF tR tL...

Page 90: ...D Power Supply Voltage Measured to GND 0 5 7 0 V Vi Digital Input Applied Voltage2 GND 0 5 V Ai Digital Input Forced Current3 4 100 100 mA Vo Digital Output Applied Voltage2 GND 0 5 VDD 0 5 V Ao Digit...

Page 91: ...Voltage Logic HIGH TTL Compatible Inputs 2 0 VDD V IOZH Hi Z Leakage Current HIGH VDD Max VIN 3 3 Volt 33 A IOZL Hi Z Leakage Current LOW VDD Max VIN VSS 10 A CI Digital Input Capacitance TA 25o C f...

Page 92: ...n set up time 4 7 us tHD sta Start condition hold time 4 0 us tSU stp Stop condition set up time 4 0 us tLOW SCL Low time 4 7 us tHIGH SCL High time 4 0 us tR SCL SDA rise time 1 0 us tF SCL SDA fall...

Page 93: ...mm min norm max min norm max A 1 68 E 9 0 BSC A1 0 05 0 15 E1 7 0 BSC A2 1 35 1 4 1 45 e 0 45 0 65 0 75 b 0 17 0 22 0 27 L 0 63 0 6 1 03 C 0 09 0 20 L1 1 00 REF D 9 0 BSC D1 7 0 BSC 12 17 18 7 28 29 3...

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Page 101: ...Product Specification of 42XGA PDP Module Specification For Approval 99 148...

Page 102: ...hock 5 If the product emits smoke an abnormal smell or makes an abnormal sound immediately turn off the power If noting is displayed or if the display goes out during use immediately turn off the powe...

Page 103: ...strike the glass surface of the display with a hard object The glass may break or be scratched If the glass breaks you may be injured 9 If you glass surface of the display breaks or is scratched do no...

Page 104: ...range specified by such standards 13 If this product is used as a display board to display a static image image sticking occurs This means that the luminance of areas of the display that remain lit fo...

Page 105: ...d range is applied the product may malfunction or be damaged 6 Do not store this product in a location where temperature and humidity are high This may cause the product to malfunction 7 If the glass...

Page 106: ...ixels This is the display device which offers vivid colors with adopting AC plasma technology by LG Electronics Inc FEARURES High peak brightness 1 000cd m2 Typical and high contrast ratio 5 000 1 Typ...

Page 107: ...ell basis 920 1 H 518 4 V 0 5mm 1005 H 597 V 60 7 D 1mm RGB Closed type R 1024 G 1024 B 1024 15 3 Kg 0 5 Kg Net 1EA 113 5 Kg 5 Kg 5EA 1BOX 16 9 Typical 1000cd 1 100 White Window Typical 50 1 In a brig...

Page 108: ...attern is displayed on the panel Color PDP 1024 X 768 pixels Address Driver Scan Driver Common sustain driver Vcc 5V Display data Driver timing Memory Controller Driver Timing Controller Input Interfa...

Page 109: ...e V 70 Va Address Voltage V 6 4 5 Vcc Logic Voltage Remarks Unit Max Min Symbol Item mVp p 500 Ripple Noise V 3 At the peak current Voltage Regulation Amean 1 5 0 1 Dependent on the characteristics of...

Page 110: ...investigation In order to use information technology equipment the end user product should satisfy the insulation and material requirements on Safety Standards of IEC 60950 EN 60950 UL60950 and CSA C2...

Page 111: ...data Min 2 frame because of reducing image sticking Min 1 sec Min 2 frame Normal Display Vcc 5V Va Vs DISPEN TVaR TVsR TOn TVaF TVsF TOff ms 800 150 Rising Time of Vs 10 to 90 TVsR ms 300 100 Falling...

Page 112: ...R3 G2 G3 B2 B3 B6 B7 B8 B9 Hsync Vsync BLANK G5 G6 G7 G8 G9 B4 B5 R4 R5 R6 R7 R8 R9 G4 Related Output Signal Channel E Neg Receiver Input RE Channel E Pos Receiver Input RE Channel D Neg Receiver Inp...

Page 113: ...is to be tied to ground signal and TE is to be tied to 3 3V signal to set the 2 LSB of 10 bits video signal to 0 8bit application 10bit application twisted pair cable LVDS Connector Tx LVDS Connector...

Page 114: ...SYNC tWV tVH THSYNC 1 2 3 4 768 tHV Vsync Hsync Vsync Hsync PIX_CLK BLANK Period of valid data DATA THSYNC Hsync tWH tHC TCLK 1 2 tCH 1024 tWCLK2 tWCLK1 tSUB tHB PIX CLK BLANK DATA tSUD thd d1 d2 d102...

Page 115: ...Min Typ Max Unit Remark 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Tvsync t Thsync wv t vh t hv t wh t hc t ch t clk t sub t hb t sud t wclk1 t wclk2 t hd 15 H D D D H D H H 16 604 803H 16 666 806H 16 728 809H...

Page 116: ...bol Min Typ Max Unit Remark 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Tvsync t Thsync wv t vh t hv t wh t hc t ch t clk t sub t hb t sud t wclk1 t wclk2 t hd 15 H D D D H D H H 19 850 960H 19 995 967H 20 139 9...

Page 117: ...Product Specification of 42XGA PDP Module 115 148...

Page 118: ...t Specification of 42XGA PDP Module First 1byte data must be 0001 1100 0x1C last 1bit is 0 write mode 1 S 2 8 A 1 2 8 A Chip ID Sub Address MSB R W LSB MSB LSB 1 2 8 A P Sub Data MSB LSB SDA SCL A A 1...

Page 119: ...0 gamma_60 1 0 gamma_50 1 0 scroll_mode 1 0 scroll_ mode_sw R Bw_inv _sw R Color Inversion Registers 0x10 ISM Mode Registers 0x18 Scroll Register 0x11 ps_mode_60 2 0 ps_mode_50 2 0 R R Power Save Mod...

Page 120: ...conversion Function Don t care hz_select Auto Mode sync_auto 1 hz_select 0 sync_auto R R R R R 0x01 R R R R 0 0 1 R Default Sync Mode Registers 0 1 2 3 4 5 6 7 I2 C Data I2 C Addr 0 0 R R R R br_mode6...

Page 121: ...mode_50 2 0 R R 0x09 R 0 0 R Power Save Mode Registers Default 0 1 2 3 4 5 6 7 I2 C Data I2 C Addr ps_mode_50 2 0 Power save mode for 50Hz ps_mode_60 2 0 Power save mode for 60Hz Power save mode 000 n...

Page 122: ...60 1 0 Gamma mode for 60Hz Color Inversion Registers Bw_inv_sw R R R R R R R 0x10 R R R R R R 0 R Color Inversion Registers Default 0 1 2 3 4 5 6 7 I2 C Data I2C Addr Image inversion enable signal for...

Page 123: ...scroll_mode 1 horizontal scroll ON OFF 1 ON 0 OFF default 1 scroll_mode 0 vertical scroll ON OFF 1 ON 0 OFF default 1 Scroll procedure C L L C C U U C C R R C C D D C C Center L Left R Right U Up D D...

Page 124: ...age White Brightness cd m2 2 1 000 700 1 white window BWP Peak White Brightness Unit Max Typ Min Condition 1 Symbol ITEM H V H 10 V 10 H 10 V 10 H 2 V 2 1 window dark position Peak brightness contrast...

Page 125: ...screen 2points allowed A B Zone overlap N 2 100mm Circle screen 2points allowed A zone Non Ignition Dot 1 Unstable Dot 2 Specification Defect Cell Defect Specifications B zone 75 of display area A zo...

Page 126: ...Front Backside Free Falling 30cm 1 25G 5 to 55Hz Sweep time 2Min Y direction 60minutes Bottom Drop 5ea Packed state Non Operational 5ea Packed state Vibration Remark Condition Item Recommended Environ...

Page 127: ...splayed for a long time a difference in brightness is caused around the lighting area and non lighting area due to deterioration in the fluorescent substance When the present pattern is changed over t...

Page 128: ...proposals of installation paying attentions to the two points the reduction of difference in brightness achieved by integrated lighting time leveling and the method of edge smearing to make image sti...

Page 129: ...Product Specification of 42XGA PDP Module Confidential 6 OUTLINE DRAWING Front View 127 148...

Page 130: ...Product Specification of 42XGA PDP Module Rear View 128 148...

Page 131: ...GT200 8P SS A Housing GIL S 8S S2C2 S Mkaer LG Cable GT200 8P SS A Pin numbers View from the pin connection side 8 7 6 5 4 3 2 1 Pin No Symbol 1 2 3 4 5V Pin No Symbol 5 6 7 8 GND GND 5V 5V 5V GND GN...

Page 132: ...e panel in an LG 42PC3D These parts are regular LG panel parts and can be ordered from any distributor of LG parts Please make sure to fax or email a copy of the invoice the service dept so an adjustm...

Page 133: ...EL Identification Label 6 0 1 8 6 0 1 8 6 0 1 8 6 0 1 8 2 5 7 0 PDP42X2 2 Model Name Bar Code Code 128 Contains the manufacture No Manufacture No The trade name of LG Electronics Manufactured date Yea...

Page 134: ...Hazard LABEL Voltage Label Model Name Operational Voltage LABEL Safety Approval Label Model Name Max Watt Max Volts Max Amps The Trade Name of LG Electronics TUV Approval Mark Safety Approval Mark Saf...

Page 135: ...wn of the module like the picture below It has to use some supporter of 10cm height in the bottom of the module 5 Insert wrapped modules with top packings Insert wrapped modules arrow direction of the...

Page 136: ...134 148...

Page 137: ...00 Piece S 8 G300 421D03 07NA ROHS POLYFOAM BOTTOM FOR 421D HORIZONTAL PACKING LAN DO WANG 1 000000 Piece S 9 G300 421D04 07NA ROHS POLYFOAM TOP FOR 421D HORIZONTAL PACKING LAN DO WANG 1 000000 Piece...

Page 138: ...CTIVE ADHESIVE SHI KE FA 6 000000 Piece S 29 G553 005007 10BB ROHS AL SHIELD GASKET 50X7X1 0MM W CONDUCTIVE ADHESIVE SHI KE FA 1 000000 Piece S 30 G553 006007 25BB ROHS AL SHIELD GASKET 60X7X2 5MM W C...

Page 139: ...000 Piece S 47 G579 42D102 09A ROHS SERIAL NO BAR CODE LABEL 42D1 1 000000 Piece S 48 G579 42D105 01A ROHS PROTECTIVE EARTH LABEL FOR ESA 42TD1 1 000000 Piece S 49 G590 421D01 11APA ROHS WARRANTY CARD...

Page 140: ...S BATTERY AAA R03P1 5V 2 CHAO YANG 2 000000 Piece S 61 G734 BP0401 03 ROHS PLASTIC STAND FOR PDP421D CD 460MM W O PACKING BLACK 605870 1 000000 SET S 62 G771B421D03 01 ROHS IR RECEIVE PCB ASS Y S MT53...

Page 141: ...NC 17 18 years and older X Adult If you set PG 13 G and PG movies be available PG 13 R NC 17 and X will be blocked Press the Menu button to exit the sub menu Unlocking programs temporarily If you try...

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