Akai PDP42Z5TA - 42" Plasma TV, Service Manual

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CE2836
DIGITAL AUDIO SERIAL INTERFACE
There are two independent PCM serial ports, one for DAC and one for ADC. The DAC digital serial interface consists of 3
serial input pins, DIN1, DIN2, DIN3, one serial clock input/output pin, DABCK, and one left/right indicator input/output pin,
DAFS. The ADC consists of a data output pin, DOUT and one serial clock input/output pin, ADBCK, and one left/right
indicator input/output pin, ADFS. The BCK and FS are output pins when the respective port is configured as
‘Master ’, and
input pin when it is configured as ‘ Slave ’ port. The Master/Slave operations are setup via CREGA[7] and CREGA[3]. The
data are 2’s complement MSB first numbers. The CE2836 supports four resolution, which are selected programming the
control register CREG0 and CRFEGA via the I
2
C serial control port. Table 3 describes these four resolution.
The DIN and DOUT can be either 24-bit or 32-bit per frame as well as left justified, right justified or I2S. .
TDM Input Format
The CE2836 support Time Division Multiplex data input. In this format only one data input pin is required. The six channel
data are sent in serial order, channel 1 first, followed by channel 2 and so forth. The number of bits per channel is defined by
CREG0[5:4].
Table (3): Audio Serial Data Input Resolution,
Format NBIT[1:0] DIN, DOUT
0 00 16-bit
1 01 20-bit
2 10 24-bit (default)
3 11 32-bit
Table (4): Audio Serial Data Input Modes
Mode FMT[1:0] DIN, DOUT
0 00 Right Justified
1 01 Left Justified
2 10 I2S (default)
3 11 TDM
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