Akai PDP42Z5TA - 42" Plasma TV, Service Manual

Page: 70 / 141

CE2836
Table 2.
Sampling
Rate
ADC XCK Requiremen
t
DACDIV==0 DACDIV==1
32 K
XCK Freq 12.288 MHz 8.192 Mhz. 24.576 Mhz 16.384 Mhz
SRC[1:0] [10], 384 fs (#), 256 fs [10], 768fs (#), 512 fs
44.1K
XCK Freq 16.934 Mhz 11.29 Mhz. 33.869 Mhz 22.579 Mhz
SRC[1:0] [10], 384fs [00], 256 fs [10], 768 fs [00], 512fs
48 K
XCK Freq 18.432 MHz 12.288 Mhz 36.864 MHz 24.576 Mhz.
SRC[1:0] [10], 384 fs [00], 256 fs [10], 768fs [00], 512 fs
96 K
XCK Freq 18.432 MHz 12.288 Mhz. 36.864 MHz 24.576 Mhz.
SRC[1:0] [11], 192 fs [01], 128 fs [11], 384 fs [01], 256 fs
All the XCK clock rate listed are supported in the ‘Slave Mode’ .
SRC Registers are used in the ‘
Master Mode ’. (#) are not supported in the ‘Master Mode’ .
ADC AUTODETis CREG9[7], DAC SRC[1:0]are CREG9[6:5] and DACDIV is CREG9[4].
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