CE2836
SERIAL PORT CONTROL REGISTER ASSIGNMENT
There are 8 registers dedicated to the CE2836 for chip functional programming, The register addresses assignments are
Address
(decimal)
Register
Default
Value
Register Function
0
CREG0[7:0]
A0
DAC Control REG0: Data input format, de-emphasis filter
selection
1
CREG1[7:0]
80
DAC Control REG1: Input format and PLL output fre-
quency selection
2
CREG2[7:0]
80
Volume Control Register for DAC channel 1, left
3
CREG3[7:0]
80
Volume Control Register for DAC channel 1, right
4
CREG4[7:0]
80
Volume Control Registerl for DAC channel 2, left
5
CREG5[7:0]
80
Volume Control Register for DAC channel 2, right
6
CREG6[7:0]
80
Volume Control Register for DAC channel 3, left
7
CREG7[7:0]
80
Volume Control Registerl for DAC channel 3, right
8
CREG8[7:0]
82
ADC Proc REG: ALC and Noise Gate Control Registers
9
CREG9[7:0]
A0
ADC Control Register.
10
CREGA[7:0]
00
CHIP Control Register.
11
CREGB[7:0]
01
ADC MUX Select.
12
CREGC[7:0]
99
ADC Input Gain Select
13
CREGD[7:0]
92
Chip Soft Reset.
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Summary of Contents for PDP42Z5TA - 42" Plasma TV
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Page 101: ...Product Specification of 42XGA PDP Module Specification For Approval 99 148...
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