SERIES APZU+ ACROPACK
USER’S MANUAL
Acromag, Inc. Tel: 248-295-0310 -
30
-
www.acromag.com
USB 24MHz clock to USB3320 chip.
Ethernet 25MHz clock to Marvel 88E1512 chip.
32.7KHz used to maintain an accurate time base for system and application
software. On the APZU+ module this real time clock does not operate or
maintain time when module is power down. See chapter 7 of Xilinx user
guide UG1085 for more information on the real time clock.
Reset
The APZU+ Reset is managed by the Texas Instrument Power Chip. At
power-up the Zynq chip is held in reset until all power rails have ramped up
and are stable. A push button on the
APZU Cable Breakout panel Acromag
part number 5028-626
allows manual resetting of the Zynq chip.
