131
SHR
D0
K4
D.
n
1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0
SM22
0
SM22
※
※
Highest
bit
Lowest
bit
Move
right
Highest
bit
Lowest
bit
Execute
once
M1
Bit n
4-7-2
.
Logic shift left [LSL], Logic shift right [LSR]
1. Summary
Do logic shift right/left for the data
Logic shift left [LSL]
16 bits
LSL
32 bits
DLSL
Execution
condition
Normally ON/OFF,
rising/falling edge
Suitable
Models
XD, XL
Hardware
requirement
-
Software
requirement
-
Logic shift right [LSR]
16 bits
LSR
32 bits
DLSR
Execution
condition
Normally ON/OFF,
rising/falling edge
Suitable
Models
XD, XL
Hardware
requirement
-
Software
requirement
-
2. Operands
Operands Function
Data Type
D
Source data address
16 bits/32 bits, BIN
n
Arithmetic shift left/right times
16 bits/32bits, BIN
3. Suitable soft components
*Notes: D includes D, HD; TD includes TD, HTD; CD includes CD, HCD, HSCD, HSD;
DM includes DM, DHM; DS includes DS, DHS.
Operand
System
Constant Module
D
*
FD
TD
*
CD
*
DX
DY
DM
*
DS
*
K /H
ID
QD
D
●
●
●
●
●
●
n
●
Word
Содержание XD Series
Страница 1: ...XD XL series PLC User manual Instruction WUXI XINJE ELECTRIC CO LTD Data No PD05 20201022 3 5 ...
Страница 210: ...209 ...
Страница 314: ...313 B Double click the middle part to modify ...