196
5-9-2
.
Single phase 100-segment HSC [CNT]
Summarization
Single phase 100-segment HSC instruction.
Single phase 100-segment HSC [CNT]
16-bit instruction
-
32-bit instruction
CNT
Execution condition
Normal ON/OFF
Suitable model
XD, XL (exclude
XL1, XD1)
Hardware
requirements
-
Software
requirements
-
Operand
Operand
Function
Type
S1
Set the HSC (for example: HSC0)
32 bits, BIN
S2
Set the compare value (eg. K100, D0 )
32 bits, BIN
S3
Set the 100-segment setting value
32 bits, BIN
Suitable soft components
*Notes: D includes D, HD; TD includes TD, HTD; CD includes CD, HCD, HSCD, HSD;
DM includes DM, DHM; DS includes DS, DHS.
CNT
HSC0
HD0
S1.
S2.
M0
HD100
S3.
When the high-speed counter HSC0 counts in single-phase mode, high-speed counting
value is compared to data block starting from HD100 (such as HD102, HD102, HD104
and other double-word registers), it will immediately produce the corresponding high-
speed counting interrupt when the condition is met, each section of the corresponding
interrupt marks please refer to chapter 5-9-4.
During the high-speed counting process, it is invalid to modify the set value of 100
segments.
In the process of high-speed counting, the driving condition M0 can not be
disconnected. If M0 is disconnected and then rebooted, no interruption will occur. The
high-speed counter must be reset first, and then set ON M0 again to produce
interruption.
When the interrupt is finished in a single execution, if it needs to start the interruption
again, the high-speed counter must be reset first, and then the driving condition must
be ON again.
In interrupt loop mode, interrupts can be generated in sequence as long as M0 remains
Description
Operand
System
Constant Module
D
*
FD
TD
*
CD
*
DX
DY
DM
DS
*
K /H
ID
QD
S1
Only can be HSC
S2
●
●
S3
●
Word
Содержание XD Series
Страница 1: ...XD XL series PLC User manual Instruction WUXI XINJE ELECTRIC CO LTD Data No PD05 20201022 3 5 ...
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Страница 314: ...313 B Double click the middle part to modify ...