SARA-N2 / N3 series - System integration manual
UBX-17005143 - R13
Design-in
Page 65 of 95
C1-Public
2.6.2
Secondary auxiliary UART interface
☞
SARA-N2 modules do not include a secondary auxiliary UART interface.
☞
SARA-N3 "00" product version do not support a secondary auxiliary UART interface.
2.6.2.1
Guidelines for secondary auxiliary UART circuit design
If RS-232 compatible signal levels are needed, two different external voltage translators (e.g. Maxim
MAX3237E and Texas Instruments SN74AVC4T774) can be used. The Texas Instruments
’
chips
provide the translation from 1.8 V / 2.8 V to 3.3 V, while the Maxim chip provides the translation from
3.3 V to RS-232 compatible signal level.
If a 1.8 V application processor (DTE) is used, and the generic digital interfaces of the module (DCE)
are configured to operate at 1.8 V (
V_INT
= 1.8 V, if the
VSEL
pin is connected to GND; see
), the
circuit should be implemented as described in
TxD
Application processor
(1.8V DTE)
RxD
GND
SARA-N3 series
(1.8V DCE)
17
TXD_AUX
19
RXD_AUX
GND
21
VSEL
Figure 42: SARA-
N3 series’ UART
AUX application circuit with TXD_AUX / RXD_AUX lines connection (1.8 V DTE / 1.8 V DCE)
If a 2.8 V application processor (DTE) is used, and the generic digital interfaces of the module (DCE)
are configured to operate at 2.8 V (
V_INT
= 2.8 V, if the
VSEL
pin is left unconnected: see
), the
circuit should be implemented as described in
TxD
Application processor
(2.8V DTE)
RxD
GND
SARA-N3 series
(2.8V DCE)
17
TXD_AUX
19
RXD_AUX
GND
21
VSEL
Figure 43: SARA-
N3 series’ UART
AUX application circuit with TXD_AUX / RXD_AUX lines connection (2.8 V DTE / 2.8 V DCE)
If a 3.0 V application processor is used and the generic digital interfaces of the module are configure
to operate at 1.8 V (
V_INT
= 1.8 V, if the
VSEL
pin is connected to GND: see
), then the 1.8 V UART
of the module (DCE) can be connected to the 3.0 V UART of the application processor (DTE) by means
of an appropriate unidirectional voltage translators providing partial power down feature (thus the
DTE 3.0 V supply can be also ramped up before the module
V_INT
1.8 V supply), using the
V_INT
supply
output of the module as the 1.8 V supply for the voltage translators on the module side, and the 3.0 V
supply rail application processor on the application processor side.
☞
The ESD sensitivity rating of auxiliary UART pins is 1 kV (HBM according to JESD22-A114). Higher
protection level could be required if the lines are externally accessible on the application board.
Higher protection level can be achieved by mounting an ESD protection (e.g. EPCOS
CA05P4S14THSG varistor array) close to accessible points.
2.6.2.2
Guidelines for secondary auxiliary UART layout design
The UART serial interface requires the same consideration regarding electro-magnetic interference
as any other digital interface. Keep the traces short and avoid coupling with RF line or sensitive analog
inputs, since the signals can cause the radiation of some harmonics of the digital data frequency.
