SARA-N2 / N3 series - System integration manual
UBX-17005143 - R13
System description
Page 26 of 95
C1-Public
1.9.1.2
UART signal behavior
At the module switch-on, before the UART interface initialization (as described in the power-on
sequence reported in
), each pin is first tri-stated and then is set to its related
internal reset state. At the end of the boot sequence, the UART interface is initialized and the UART
interface is enabled as AT commands interface.
The configuration and the behavior of the UART signals after the boot sequence are described below.
See section
for definition and description of module operating modes referred to in this section.
RXD signal behavior
The module data output line (
RXD
) is set by default to the OFF state (high level) at UART initialization.
The greeting message is sent on the
RXD
line after the completion of the boot sequence to indicate
the completion of the UART interface initialization. For more details regarding how to set greeting
text, see the SARA-N2 / SARA-N3 series AT commands manual
The module holds
RXD
in the OFF state until the module does not transmit some data.
TXD signal behavior
The module data input line (
TXD
) is assumed to be controlled by the external host once UART is
initialized.
There is no internal pull-up / pull-down inside the SARA-N2 modules on the
TXD
input. Instead, the
SARA-N3 series modules have an internal pull-up on the
TXD
input.
1.9.1.3
UART and deep sleep mode
To limit the current consumption, SARA-N2 series modules automatically enter deep-sleep mode
whenever possible, that is if there is no data to transmit or receive. When in deep-sleep mode the
UART interface is still completely functional and the SARA-N2 module can accept and respond to any
AT command. All the other interfaces are disabled.
The application processor should go in standby (or lowest power consumption mode) as soon as the
SARA-N2 module enters the deep-sleep mode and there is no more data to be transmitted.
At any time the DTE can request the SARA-N2 module to send data using the related commands (for
more details, see the SARA-N2 / SARA-N3 AT commands manual
development guide
); these commands automatically force the SARA-N2 module to exit the deep-
sleep mode.
To limit the current consumption, SARA-N3 series modules automatically enter the low power idle
mode whenever possible, that is, if there is no data to transmit or receive. In low power idle mode, the
UART interface is still completely functional and the SARA-N3 module can accept and respond to any
AT command.
SARA-N3 series modules automatically enter the deep-sleep mode if the Power Saving Mode defined
in 3GPP release 13 is enabled by A dedicated AT command (for more details, see the SARA-N2 /
SARA-N3 series AT commands manual
), entering the lowest possible power mode. The UART
interface is not functional: a wake-up event, consisting in proper toggling of the
PWR_ON
line, is
necessary to trigger the wake up routine of the SARA-N3 series modules that subsequently enter
back into the active mode as in case of expiration of the “Periodic Update Timer” as per the Power
Saving Mode defined in 3GPP release 13.
