Ublox SARA-N2 Series, Руководство по системной интеграции

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SARA-N2 / N3 series - System integration manual
UBX-17005143 - R13 Design-in Page 68 of 95
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2.8 General Purpose Input/Output (GPIO)
2.8.1.1 Guidelines for GPIO circuit design
A typical usage of SARA-N2 / N3 series modules ’ GPIOs can be the following:
• GPIO1 pin of SARA-N2 modules providing diagnostic trace log output: it is recommended to
connect the GPIO1 pin to a test-point accessible for diagnostic purposes (see section 2.6.3 )
• GPIO4 pin of SARA-N3 series modules providing module status indication
•
GPIO5 pin of SARA-N3 series modules providing SIM card detection functionality (see section 2.5 )
• CTS pin set as Network Indicator (see below) or Ring Indicator (see section 2.6.1 )
SARA-N2 series
CTS
R1
R3
3V6
Network indicator
R2
11
DL1
T1
TestPoint
GPIO1
16
UART for diagnostic
Figure 47: Application circuit for network indication provided over CTS
Reference Description Part number - Manufacturer
R1 10 k  resistor 0402 5% 0.1 W Various manufacturers
R2 47 k  resistor 0402 5% 0.1 W Various manufacturers
R3 820  resistor 0402 5% 0.1 W Various manufacturers
DL1 LED red SMT 0603 LTST-C190KRKT - Lite-on Technology Corporation
T1 NPN BJT Transistor BC847 - Infineon
Table 24: Components for network indication application circuit
☞
Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 k
Ω
resistor
on the board in series to the GPIO of SARA-N2 / N3 series modules.
☞
Do not apply voltage to any GPIO of the module before the switch- on of the GPIO’s supply ( V_INT ),
to avoid latch-up of circuits and allow a proper boot of the module.
☞
ESD sensitivity rating of the GPIO pins is 1 kV (HBM according to JESD22-A114). Higher protection
level could be required if the lines are externally accessible and it can be achieved by mounting an
ESD protection (e.g. EPCOS CA05P4S14THSG varistor array) close to accessible points.
☞
If GPIO pins are not used, they can be left unconnected on the application board, but it is
recommended to provide direct access to the
GPIO1 pin by means of accessible test-points for
diagnostic purposes.
2.8.1.2 Guidelines for GPIO layout design
There are no specific layout design recommendations for GPIOs lines.
2.9 Reserved pins (RSVD)
SARA-N2 / N3 series modules have pins reserved for future use, marked as RSVD .
All the RSVD pins are to be left unconnected on the application board, except for the RSVD pin number
33 of SARA-N2 modules that can be externally connected to ground.