SARA-N2 / N3 series - System integration manual
UBX-17005143 - R13
Design-in
Page 46 of 95
C1-Public
In both cases, selecting an external or an internal antenna, observe these recommendations:
•
Select an antenna providing optimal return loss (or V.S.W.R.) figure over all the operating
frequencies.
•
Select an antenna providing optimal efficiency figure over all the operating frequencies.
•
Select an antenna providing appropriate gain figure (i.e. combined antenna directivity and
efficiency figure) so that the electromagnetic field radiation intensity do not exceed the regulatory
limits specified in some countries (e.g. by FCC in the United States).
☞
For the additional specific guidelines for the SARA-N211 and SARA-N310 modules integration in
applications intended for use in potentially explosive atmospheres, see section
2.4.1.2
Guidelines for antenna RF interface design
Guidelines for ANT pin RF connection design
Proper transition between the
ANT
pin and the application board PCB must be provided,
implementing the following design-in guidelines for the layout of the application PCB close to the pad
designed for the
ANT
pin:
•
On a multi layer board, the whole layer stack below the RF connection should be free of digital lines
•
Increase GND keep-out (i.e. clearance, a void area) around the
ANT
pad, on the top layer of the
application PCB, to at least 250
µ
m up to adjacent pads metal definition and up to 400
µ
m on the
area below the module, to reduce parasitic capacitance to ground, as described in the left picture
in
•
Add GND keep-out (i.e. clearance, a void area) on the buried metal layer below the
ANT
pad if the
top-layer to buried layer dielectric thickness is below 200
µ
m, to reduce parasitic capacitance to
ground, as described in the right picture in
Min.
250
µ
m
Min. 400
µ
m
GND
ANT
GND clearance
on very close buried layer
below ANT pad
GND clearance
on top layer
around ANT pad
Figure 24: GND keep-out area on the top layer around ANT pad and on the very close buried layer below ANT pad
