SARA-N2 / N3 series - System integration manual
UBX-17005143 - R13
System description
Page 12 of 95
C1-Public
Function
Pin name
Modules Pin No
I/O
Description
Remarks
UART
(additional)
RXD_FT
SARA-N3 28
O
Data output
Circuit 104 (RXD) in ITU-T V.24, at
V_INT
voltage level.
Supporting FW update via u-blox EasyFlash tool and
Trace log.
Provide a test point for FW upgrade and diagnostic.
See section
for functional description.
See section
for external circuit design-in.
TXD_FT
SARA-N3 29
I
Data input
Circuit 103 (TXD) in ITU-T V.24, at
V_INT
voltage level.
Supporting FW update via u-blox EasyFlash tool and
Trace log.
Provide a test point for FW upgrade and diagnostic.
See section
for functional description.
See section
for external circuit design-in.
GPIO1
SARA-N2 16
O
Data output
Circuit 104 (RXD) in ITU-T V.24, at
V_INT
voltage level.
Supporting Trace diagnostic logging.
Provide a test point on this pin for diagnostic.
See sections
for functional description.
See sections
for external circuit design-in.
DDC
SCL
All
27
O
I2C bus clock line Open drain, at
V_INT
voltage level.
I2C not supported by SARA-N2 "02" versions.
I2C not supported by SARA-N3 "00" versions.
See section
for functional description.
See section
for external circuit design-in.
SDA
All
26
I/O I2C bus data line Open drain, at
V_INT
voltage level.
I2C not supported by SARA-N2 "02" versions.
I2C not supported by SARA-N3 "00" versions.
See section
for functional description.
See section
for external circuit design-in.
GPIO
GPIO1
SARA-N3 16
I/O GPIO
GPIO, at
V_INT
voltage level.
See section
for functional description.
See section
for external circuit design-in.
GPIO2
SARA-N2 24
I/O GPIO
GPIO2 not supported by "02" product versions.
SARA-N3 23
I/O GPIO
GPIO, at
V_INT
voltage level.
See section
for functional description.
See section
for external circuit design-in.
GPIO3
SARA-N3 24
I/O GPIO
GPIO, at
V_INT
voltage level.
See section
for functional description.
See section
for external circuit design-in.
GPIO4
SARA-N3 25
I/O GPIO
GPIO, at
V_INT
voltage level.
See section
for functional description.
See section
for external circuit design-in.
GPIO5
SARA-N3 42
I/O GPIO
GPIO, at
V_INT
voltage level.
See section
for functional description.
See section
for external circuit design-in.
ADC
ADC1
SARA-N3 33
I
ADC input
See section
for functional description.
See section
for external circuit design-in.
Reserved RSVD
SARA-N2 33
N/A RESERVED pin
This pin can be connected to GND.
See sections
RSVD
SARA-N2 2, 6-9,
15,17,19,
23, 25,
28,29,42
N/A RESERVED pin
Leave unconnected.
See sections
RSVD
All
31,34-37,
44-49
N/A RESERVED pin
Leave unconnected.
See sections
Table 3: SARA-N2 / N3 series modules pin definition, grouped by function