LISA-U1 series - System Integration Manual
3G.G2-HW-10002-3
Preliminary
System description
Page 50 of 125
If the module is registered with a 2G network, the paging reception period can vary from ~0.47 s (DRX = 2,
i.e. 2 x 51 2G-frames) up to ~2.12 s (DRX = 9, i.e. 9 x 51 2G-frames)
If the module is registered with a 3G network, the paging reception period can vary from 0.64 s (DRX = 6,
i.e. 2
6
3G-frames) up to 5.12 s (DRX = 9, i.e. 2
9
3G-frames).
The UART interface is automatically disabled whenever possible, if data has not been received or sent by the
UART for the timeout configured by the +UPSV AT command, and is periodically enabled to receive or send
data. When the module is in idle-mode, the UART interface is always disabled. When the module is in
active-mode or connected-mode, the UART interface is automatically disabled to reduce the consumed power, if
data has not been received or sent by the UART for the configured timeout.
The time period of the UART enable/disable cycle is configured differently when the module is registered with a
2G network compared to when the module is registered with a 3G network:
2G: the UART is enabled synchronously to paging receptions, but not necessarily at every paging reception
(to reduce the consumed power): the UART interface is enabled for 20 ms concurrently to a paging
reception, and then, as data has not been received or sent, the UART is disabled until the first paging
reception that occurs after a timeout of 2.0 s, and therefore the interface is enabled again
3G: the UART is enabled asynchronously to paging receptions: the UART interface is enabled for 20 ms, and
then, as data has not been received or sent, the UART is disabled for 2.5 s, and afterwards the interface is
enabled again
When UART interface is disabled, data transmitted by the DTE will be lost if hardware flow control is disabled. If
hardware flow control is enabled, data will be buffered by the DTE and will be correctly received by the module
when UART interface is enabled again.
When UART interface is enabled, data can be received. When a character is received, it forces the UART interface
to stay enabled for a longer time and it forces the module to stay in the active-mode for a longer time.
The active-mode duration depends by:
Network parameters, related to the time interval for the paging block reception (minimum of ~11 ms)
Duration of UART enable time in absence of data reception (20 ms)
Time period from the last data received at the serial port during the active-mode: the module doesn’t enter
idle-mode until a timeout expires. This timeout is configured by the second parameter of the +UPSV AT
command, from 40 2G-frames (i.e. 40 x 4.615 ms = 184 ms) up to 65000 2G-frames (i.e. 65000 x 4.615 ms
= 300 s). Default value is 2000 2G-frames (i.e. 2000 x 4.615 ms = 9.2 s)
Every subsequent character received during the active-mode, resets and restarts the timer; hence the active-
mode duration can be extended indefinitely.
The hardware flow-control output (
CTS
line) indicates when the UART interface is enabled (data can be sent and
received), if HW flow control is enabled, as illustrated in Figure 24.
time [s]
CTS ON
CTS OFF
UART disabled
2G/3G: 20 ms
UART enabled
2G/3G: ~9.2 s (default)
UART enabled
Data input
2G: 2.10-3.75 s
3G: 2.50 s
Figure 24: CTS behavior with power saving enabled (AT+UPSV=1) and HW flow control enabled: the CTS output line indicates
when the UART interface of the module is enabled (CTS = ON = low level) or disabled (CTS = OFF = high level)