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LISA-U1 series - System Integration Manual

3G.G2-HW-10002-3

Preliminary

System description

Page 77 of 125

These three blocks are connected by buffers (circular buffer and voiceband sample buffer) and sample rate
converters (for 8 / 16 to 47.6 kHz conversion) as illustrated in the block diagram in Figure 42, which summarizes
the voiceband audio processing in the DSP.

DAC

ADC

I2S_RXD

Switch

MIC

Microphone

Analog Gain

UF 2

UF 1

Hands-

free

To Radio

TX

Scal_Mic

Digital Gain

Sidetone

SPK_P/N

Switch

I2S_TXD

Scal_Rec

Digital Gain

Speaker

Analog gain

Tone

Generator

From

Radio RX

Speech

level

I2Sx RX

Sample Based Processing

Frame Based

Processing

PCM

Player

18
dB

UF 4

UF 3

DF 3

DF 4

DF 1

DF 2

V

oi

ce

ba

nd

Sa

m

pl

e

Buffe

r

Legend:
UF= uplink filter
DF = downlink filter

Figure 42: Voiceband processing system block diagram

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Содержание LISA-U1 Series

Страница 1: ...d the integration of the LISA U1 series HSPA wireless modules These modules are a complete and cost efficient 3 75G solution offering high speed dual band HSDPA HSUPA and quad band GSM GPRS voice and...

Страница 2: ...tion This document applies to the following products Name Type number Firmware version PCN IN LISA U100 LISA U100 00S 00 10 72 n a LISA U110 LISA U110 00S 00 10 72 n a LISA U120 LISA U120 00S 00 10 72...

Страница 3: ...necessary to read it from the beginning to the end The following symbols are used to highlight important information within the manual An index finger points out key information pertaining to module...

Страница 4: ...32 1 6 2 Module power off 36 1 6 3 Module reset 37 1 7 RF connection 38 1 8 U SIM interface 39 1 8 1 U SIM functionality 41 1 9 Serial communication 42 1 9 1 Serial interfaces configuration 42 1 9 2 A...

Страница 5: ...104 2 4 3 Antenna detection functionality 105 2 5 ESD immunity test precautions 108 2 5 1 General precautions 109 2 5 2 Antenna interface precautions 110 2 5 3 Module interfaces precautions 111 3 Fea...

Страница 6: ...ering 119 4 2 7 Hand soldering 119 4 2 8 Rework 119 4 2 9 Conformal coating 119 4 2 10 Casting 120 4 2 11 Grounding metal covers 120 4 2 12 Use of ultrasonic processes 120 5 Product Testing 121 5 1 u...

Страница 7: ...red service selectable from GSM to GPRS Optionally paging messages for GSM calls can be monitored during GPRS data transfer in not coordinating NOM II III LISA U1 series modules implement GPRS EGPRS c...

Страница 8: ...PA DDC for GPS U SIM Card UART SPI USB GPIO s Power On External Reset V_BCKP RTC Vcc Supply V_INT I O Figure 1 LISA U100 LISA U110 block diagram Wireless Base band Processor Memory Power Management Un...

Страница 9: ...high power signal circuitry there are all the low level analog RF components namely Dual band HSxPA WCDMA and quad band EDGE GPRS GSM transceiver Voltage Controlled Temperature Compensated 26 MHz Cry...

Страница 10: ...Management Unit PMU used to derive all the system supply voltages from the module supply VCC 32 768 kHz crystal connected to the Real Time Clock RTC oscillator to provide the clock reference in idle o...

Страница 11: ...ee section 1 5 4 V_INT 4 O Digital I O Interfaces supply output V_INT 1 8V typical generated by the module when it is switched on and the RESET_N external reset input pin is not forced to the low leve...

Страница 12: ...s connected to the application processor See section 1 9 2 CTS 14 O UART clear to send Circuit 106 CTS in ITU T V 24 Provide access to the pin for debugging if the USB interface is connected to the ap...

Страница 13: ...ions to ensure compatibility to module supported modes See section 1 11 2 I2S_RXD 44 I I2 S receive data Internal active pull up to V_INT 1 8 V enabled Check device specifications to ensure compatibil...

Страница 14: ...13 RSVD 44 N A RESERVED pin Do not connect See section 1 13 RSVD 42 N A RESERVED pin Do not connect See section 1 13 RSVD 41 N A RESERVED pin Do not connect See section 1 13 RSVD 39 N A RESERVED pin D...

Страница 15: ...external device If power saving is enabled the module automatically enters idle mode whenever possible Application interfaces are disabled If hardware flow control is enabled the CTS line to ON state...

Страница 16: ...nnected Mode Voice or data call enabled Microprocessor runs with 26 MHz as reference oscillator The module is prepared to accept data signals from an external device The module is switched on and a vo...

Страница 17: ...V_INT 2 x 3G Power Amplifier s Linear LDO Linear LDO Switching Step Down Linear LDO Linear LDO Linear LDO I O EBU CORE Analog SIM RTC NOR Flash DDR SRAM RF Transceiver Memory Power Management Unit 22...

Страница 18: ...o LISA U1 series Data Sheet 1 for specification Name Description Remarks VCC Module power supply input VCC pins are internally connected but all the available pads must be connected to the external su...

Страница 19: ...V typ RX slot unused slot unused slot TX slot unused slot unused slot MON slot unused slot RX slot unused slot unused slot TX slot unused slot unused slot MON slot unused slot GSM frame 4 615 ms 1 fra...

Страница 20: ...h a maximum voltage that is above the maximum rating for VCC and should therefore be avoided The use of primary not rechargeable battery is uncommon since the most cells available are seldom capable o...

Страница 21: ...hreshold e g 60 mA Output voltage slope the use of the soft start function provided by some voltage regulator must be carefully evaluated since the voltage at the VCC pins must ramp from 2 5 V to 3 2...

Страница 22: ...inear Technology Table 5 Suggested components for the VCC voltage supply application circuit using a step down regulator Low Drop Out LDO linear regulator The characteristics of the LDO linear regulat...

Страница 23: ...must be capable of delivering a DC current greater than the module maximum average current consumption to VCC pins The maximum pulse discharge current and the maximum DC discharge current are not alw...

Страница 24: ...s must be carefully evaluated since the voltage at the VCC pins must ramp from 2 5 V to 3 2 V within 1 ms to allow a proper switch on of the module To reduce voltage ripple and noise place the followi...

Страница 25: ...on to determine the average current consumption is set by the transmitted power in the transmit slot An example of current consumption profile of the data module in GSM talk mode is shown in Figure 10...

Страница 26: ...e continuously due to the Frequency Division Duplex FDD mode of operation with the Wideband Code Division Multiple Access WCDMA The current consumption depends again on output RF power which is always...

Страница 27: ...y monitor the paging channel of the current base station paging block reception in accordance to GSM system requirements When the module monitors the paging channel it wakes up to active mode to enabl...

Страница 28: ...akes up to active mode to monitor the paging channel for paging block reception 1 5 3 4 2G and 3G fixed active mode power saving disabled Power saving configuration is by default disabled or it can be...

Страница 29: ...in the Power Management Unit The output of this linear regulator is always enabled when the main voltage supply provided to the module through VCC is within the valid operating range with the module...

Страница 30: ...not required when the VCC supply is removed The date and time will not be updated when VCC is disconnected If VCC is always supplied then the internal regulator is supplied from the main supply and t...

Страница 31: ...isabled when the module is switched off or when the RESET_N pin is forced the low level The switching regulator operates in Pulse Width Modulation PWM for high output current mode but automatically sw...

Страница 32: ...on level could be required if the line is externally accessible on the application board Higher protection level can be achieved by mounting an ESD protection e g EPCOS CA05P4S14THSG varistor array on...

Страница 33: ...istor e g 100 k biased by the V_BCKP supply pin of the module A push pull output of an application processor can also be used in this case the pull up can be used to pull the PWR_ON level high when th...

Страница 34: ...d at the VCC pin the module can be switched on by the RTC alarm when the RTC system reaches a pre programmed scheduled time The RTC system will then initiate the boot sequence by instructing the Power...

Страница 35: ...Internal Reset Operational Operational Tristate Floating Internal Reset OFF ON Start up event 0 ms 5 ms 6 ms 35 ms 1000 ms PWR_ON can be set high Start of interface configuration All interfaces are co...

Страница 36: ...Since the time to perform a network detach depends on the network settings the duration of this phase can differ from the typical value reported in the following figure At the end of the switch off r...

Страница 37: ...eset state of all digital pins is reported in the pin description table in LISA U1 series Data Sheet 1 Name Description Remarks RESET_N External reset input Internal 10 k pull up to V_BCKP Table 13 Re...

Страница 38: ...RESET_N application circuit 1 7 RF connection The ANT pin has 50 nominal characteristic impedance and must be connected to the antenna through a 50 transmission line to allow transmission and recepti...

Страница 39: ...terface pins A low capacitance i e less than 10 pF ESD protection e g Infineon ESD8V0L2B 03L or AVX USB0002RP must be placed near the SIM card holder on each line VSIM SIM_IO SIM_CLK SIM_RST The SIM i...

Страница 40: ...gh by the pull up resistor connected to V_INT i e the switch integrated in the SIM connector is closed LISA U1 series C1 SIM CARD HOLDER CCVCC C1 CCVPP C6 CCIO C7 CCCLK C3 CCRST C2 GND C5 C2 C3 C5 D2...

Страница 41: ...ns is the maximum allowed rise time on the SIM_CLK line 1 0 s is the maximum allowed rise time on the SIM_IO and SIM_RST lines always route the connections to keep them as short as possible 1 8 1 U S...

Страница 42: ...presents the data terminal equipment DTE All the interfaces listed above are controlled and operated with AT commands according to 3GPP TS 27 007 4 AT commands according to 3GPP TS 27 005 5 AT command...

Страница 43: ...AT K3 HW flow control enabled AT S1 DSR line set ON in data mode and set OFF in command mode AT D1 Upon an ON to OFF transition of DTR the DCE enters online command state and issues an OK result code...

Страница 44: ...t 106 Ready for sending in ITU T V 24 TxD Transmitted data Module data input Circuit 103 Transmitted data in ITU T V 24 Internal active pull up to V_INT 1 8 V enabled RxD Received data Module data out...

Страница 45: ...signal behavior AT commands interface case See Table 3 for a description of operating modes and states referred to in this section At the switch on of the module before the initialization of the UART...

Страница 46: ...FCon FCoff MUX command for flow control issues outside the power saving configuration while the physical CTS line is still used as a power state indicator For more details please refer to Mux Impleme...

Страница 47: ...mand mode to data mode and can accept PPP packets The module sets the DCD line to the ON state then answers with a CONNECT to confirm the ATD 99 command Please note that the DCD ON is not related to t...

Страница 48: ...ure 23 if the feature is enabled by the proper AT command please refer to u blox AT Commands Manual 2 AT CNMI command Figure 23 RI behavior at SMS arrival This behavior allows the DTE to stay in power...

Страница 49: ...ke up time of the module As a consequence the first character sent when the module is in idle mode i e the wake up character won t be a valid communication character because it can t be recognized and...

Страница 50: ...ot been received or sent the UART is disabled for 2 5 s and afterwards the interface is enabled again When UART interface is disabled data transmitted by the DTE will be lost if hardware flow control...

Страница 51: ...T power saving mode when it is enabled disabled Wake up from idle mode to active mode via data reception If data is transmitted by the DTE during the module idle mode it will be lost not correctly rec...

Страница 52: ...mes 9 2s after the last data received time Wake up time up to 15 6 ms time TxD module input Wake up character Not recognized by DCE Valid characters Recognized by DCE Figure 26 Wake up via data recept...

Страница 53: ...tionality conforming to ITU Recommendation 3 in DTE DCE serial communication the complete UART interface of the module DCE must be connected to the DTE as described in Figure 27 LISA U1 series DCE TxD...

Страница 54: ...TP Figure 28 UART interface application circuit with partial V 24 link 5 wire in the DTE DCE serial communication If only TxD RxD RTS and CTS lines are provided as described in Figure 28 the procedur...

Страница 55: ...s active mode 20 ms after a low to high transition on the TxD input line the recognition of the subsequent characters is guaranteed until the module is in active mode Data delivered by the DTE can be...

Страница 56: ...SB USB_D USB Data Line D 90 nominal differential impedance Pull up or pull down resistors and external series resistors as required by the USB 2 0 high speed specification 7 are part of the USB pad dr...

Страница 57: ...st Remote wake up is accomplished using electrical signaling described in the Universal Serial Bus Revision 2 0 specification 7 When the USB enters suspended state the average VCC module current consu...

Страница 58: ...the PWR_ON pin or enable the DC supply connected to the VCC pin to start the module firmware upgrade see Firmware Update Application Note 16 If the USB interface is not used the USB_D USB_D and VUSB_...

Страница 59: ...terface without specific configuration The SPI device shall look for all upper SW layers like any other serial device This means that LISA U1 series modules emulate all serial logical lines the transm...

Страница 60: ...The number of clock periods sent by the master is exactly that one of the frame size to be transferred The SPI_SRDY line will be set low after the master sets the clock line to idle state The SPI_MRDY...

Страница 61: ...a transfer initiated by application processor master with a sleeping LISA U1 series module slave When the slave is sleeping idle mode the following actions happen 1 The Master wakes the slave by setti...

Страница 62: ...e output for the module since it runs as SPI slave it must be connected to the data line input MISO of the application processor that runs as an SPI master SPI_SCLK is the clock input for the module s...

Страница 63: ...DDC interface for communication with u blox GPS receivers is available on LISA U1 series modules This interface is dedicated exclusively to access u blox GPS receivers Name Description Remarks SCL I2...

Страница 64: ...ata line Since both lines are open drain outputs the DDC devices can only drive them low or leave them open The pull up resistor pulls the line up to the supply rail if no DDC device is pulling it dow...

Страница 65: ...ported by upcoming FW version LISA U1 series R1 IN OUT GND GPS LDO Regulator SHDN u blox 1 8 V GPS receiver SDA2 SCL2 R2 1V8 1V8 VMAIN 1V8 U1 21 GPIO2 SDA SCL C1 TxD1 EXTINT0 GPIO3 GPIO4 46 45 23 24 V...

Страница 66: ...bus Bidirectional Voltage Translator PCA9306DCURG4 Texas Instruments U3 Generic Bidirectional Voltage Translator TXB0104PWR Texas Instruments Table 26 Components for DDC application circuit for u blox...

Страница 67: ...enabled the wireless module automatically uploads data such as position time ephemeris almanac health and ionospheric parameter from the GPS receiver into its local memory and restores back the GPS re...

Страница 68: ...al to analog converter The analog audio output is selected when the parameter main_downlink in AT USPM command is set to Normal earpiece Mono headset or Loudspeaker the downlink analog path profiles u...

Страница 69: ...ing a headset with a 2 2 k electret microphone and a 32 receiver to the LISA U120 and LISA U130 modules with an external low noise LDO voltage regulator to provide a proper supply for the microphone M...

Страница 70: ...y for the microphone Mount an 82 nH series inductor e g Murata LQG15HS82NJ02 on each microphone line and a 27 pF bypass capacitor e g Murata GRM1555C1H270J on all audio lines to minimize RF coupling a...

Страница 71: ...voice band handling echo canceller and automatic gain control managed via software refer to u blox AT commands manual 2 AT UHFP command Figure 39 shows an example of an application circuit connecting...

Страница 72: ...10V GRM155R71C104KA01 Murata D1 D2 Low Capacitance ESD Protection USB0002RP or USB0002DP AVX J1 Microphone Connector J2 Speaker Connector L1 L2 82nH Multilayer inductor 0402 self resonance frequency 1...

Страница 73: ...o device For example in case of differential input impedance of 600 the two 10 F capacitors will set the 3 dB cut off frequency to 53 Hz while for single ended connection to 600 external device the cu...

Страница 74: ...5 0 1 W RC0402JR 070RL Yageo Phycomp R2 R4 Not populated Table 31 Connection to an Audio Device 1 11 2 Digital Audio interface LISA U120 and LISA U130 modules support a bidirectional 4 wire I 2 S digi...

Страница 75: ...lgorithm acts on I 2 S path Refer to the u blox AT Commands Manual 2 AT UI2S command for possible settings of I 2 S interface 1 11 2 1 I 2 S interface PCM mode Main features of the I 2 S interface in...

Страница 76: ...l interface The analog amplifiers are skipped in this case Possible processing of audio signal are Speech encoding uplink and decoding downlink The following speech codecs are supported in firmware on...

Страница 77: ...which summarizes the voiceband audio processing in the DSP DAC ADC I2S_RXD Switch MIC Microphone Analog Gain UF 2 UF 1 Hands free To Radio TX Scal_Mic Digital Gain Sidetone SPK_P N Switch I2S_TXD Scal...

Страница 78: ...gured to provide the GPS supply enable function is set as o Output High to switch on the u blox GPS receiver if the parameter mode of AT UGPS command is set to 1 o Output Low to switch off the u blox...

Страница 79: ...simultaneously set the same mode on another pin also on all the GPIOs None GPIO pin is by default configured as General purpose input The pin configured to provide the General purpose input function...

Страница 80: ...detection function Can be alternatively configured by the AT UGPIOC command as Output Input Network Status Indication GPS Supply Enable Pad disabled Table 33 GPIO pins The GPIO pins ESD sensitivity ra...

Страница 81: ...lder CCM03 3013LFT R102 C K Components or equivalent R4 10 k Resistor 0402 5 0 1 W Various manufacturers R5 47 k Resistor 0402 5 0 1 W Various manufacturers R6 820 Resistor 0402 5 0 1 W Various manufa...

Страница 82: ...S RTC sharing function to provide a RTC Real Time Clock synchronization signal to the u blox GPS receiver connected to the wireless module setting the parameter gpio_mode of AT UGPIOC command to 5 The...

Страница 83: ...re use All the RSVD pins except pin number 5 can be left unconnected on the application board The application circuit is illustrated in Figure 44 Pin 5 RSVD must be connected to GND LISA U120 U130 5 R...

Страница 84: ...58 SPI_SRDY GND VBUS D D GND 18 VUSB_DET 27 USB_D 26 USB_D GND 100nF 5 RSVD 52 RSVD 74 RSVD GND RTC back up 27pF 27pF 27pF 82nH 54 SPK_N 53 SPK_P 39 MIC_N 40 MIC_P ESD Headset Connector ESD IN OUT GN...

Страница 85: ...TTED and European Conformance CE mark Products bearing the CE marking comply with the R TTE Directive 99 5 EC EMC Directive 89 336 EEC and the Low Voltage Directive 73 23 EEC issued by the Commission...

Страница 86: ...minimum distance of 20 cm between the radiator and your body This transmitter must not be co located or operating in conjunction with any other antenna or transmitter 1 15 3 3 Modifications The FCC r...

Страница 87: ...t RSS 210 Son fonctionnement est soumis aux deux conditions suivantes o cet appareil ne doit pas causer d interf rence o cet appareil doit accepter toute interf rence notamment les interf rences qui p...

Страница 88: ...cess to USB interface and or to UART RxD TxD lines and access to PWR_ON and or RESET_N lines on the application board in order to flash upgrade the module firmware Provide appropriate access to USB in...

Страница 89: ...rom DC source for VCC Design USB_D USB_D connection as 90 differential pair Keep routing short and minimize parasitic capacitance on the SPI lines to preserve signal integrity 2 1 3 Antenna checklist...

Страница 90: ...NT RSVD GND GND GND DSR RI DCD DTR GND RTS CTS TXD RXD GND VUSB_DET PWR_ON GPIO1 GPIO2 RESET_N GPIO3 GPIO4 GND USB_D USB_D 2 3 4 5 6 7 8 9 10 11 12 1 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 GND V...

Страница 91: ...RI DCD DTR External Reset RESET_N General Purpose I O GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 USB detection VUSB_DET Supply for Interfaces V_INT Table 35 Pin list in order of decreasing importance for layout d...

Страница 92: ...on line and the adjacent GND area on the same layer does not exceed 5 times the track width of the micro strip use the Coplanar Waveguide model for 50 characteristic impedance calculation Don t route...

Страница 93: ...series modules has a structure of four layers described in the following The Layer 1 top layer see Figure 48 provides a micro strip line to connect the ANT pin of the LISA U1 series module to the ant...

Страница 94: ...er is 0 76 mm The Layer 3 inner layer described in Figure 50 is designed for signals routing and GND plane Layer 3 thickness is 0 035 mm Figure 50 Layer 3 inner layer of u blox approved interface boar...

Страница 95: ...r the overall performance and functionality of the integrated product For detailed description check the design guidelines in section 1 5 2 Some main characteristics are VCC pins are internally connec...

Страница 96: ...maximum ratings are not exceeded place the protecting device along the path from the DC source toward the LISA U1 series module preferably closer to the DC source otherwise functionality may be compro...

Страница 97: ...g PCB lines to reduce series resistive losses when the audio output is directly connected to low impedance speaker transducer Use twisted pair cables for balanced audio usage If DC decoupling is requi...

Страница 98: ...channels whose carrier frequency is coincidental with harmonic frequencies The latter case placing the RF bypass capacitors suggested in Figure 20 near the SIM connector will mitigate the problem In a...

Страница 99: ...nt and paste mask To improve the wetting of the half vias reduce the amount of solder paste under the module and increase the volume outside of the module by defining the dimensions of the paste mask...

Страница 100: ...d Figure 53 Signals keep out area on the top layer of the application board below LISA U1 series modules 2 2 3 Placement Optimize placement for minimum length of RF line and closer path from DC source...

Страница 101: ...e call at maximum power 19 C during GPRS data transfer with 4 TX slots 16 C during EDGE data transfer with 4 TX slots up to 25 C in UMTS connection at max TX power Case to Ambient thermal resistance v...

Страница 102: ...ected If the LISA U100 U120 modules are planned for use on the entire supported bands then a dual band antenna 824 894 MHz 1850 1990 MHz should be selected Otherwise for fixed applications in specific...

Страница 103: ...ds Therefore to reduce as much as possible performance degradation due to antenna mismatch the following requirements should be met Measure the antenna termination with a network analyzer connect the...

Страница 104: ...deband log periodic like antenna was used and the comparison was done with a half lambda dipole tuned at 900 MHz frequency The measurements show both the S11 and S21 for the penta band internal antenn...

Страница 105: ...works in combination with a ground plane The ground plane ideally infinite can be reduced down to a minimum size that must be similar to one quarter of the wavelength of the minimum frequency that has...

Страница 106: ...monopole or a DC short to reference GND e g PIFA antenna For those antennas without the diagnostic circuit of Figure 58 the measured DC resistance will always be at the limits of the measurement rang...

Страница 107: ...ommands Manual 2 means that that the antenna is not connected or the RF cable is broken Reported values below the measurement range minimum limit 1 k will highlight a short to GND at antenna or along...

Страница 108: ...al coupling planes 10 Implement the following precautions to satisfy ESD immunity test requirements 10 11 12 performed at the device enclosure in compliance to the category level 11 and shown in the f...

Страница 109: ...depending on the application board handling The following precautions are suggested RESET_N pin Sensitive interface is the reset line RESET_N pin A 47 pF bypass capacitor e g Murata GRM1555C1H470JA01...

Страница 110: ...ass capacitor e g Murata GRM1555C1H470J have to be mounted on the lines connected to VSIM SIM_RST SIM_IO and SIM_CLK to assure SIM interface functionality when an electrostatic discharge is applied to...

Страница 111: ...fy ESD immunity test requirements and ESD category level pins connected to the port should be protected up to 4 kV 4 kV for direct Contact Discharge and up to 8 kV 8 kV for Air Discharge applied to th...

Страница 112: ...rt or simultaneously through the virtual serial ports of the multiplexer multiplexing mode MUX with the following constraints Using the MT s embedded TCP IP stack only 1 internal PDP context is suppor...

Страница 113: ...be generated automatically or manually following an car accident using GSM cellular service 112 When activated the in vehicle eCall system IVS creates an emergency call carrying both voice and data e...

Страница 114: ...mits see Figure 61 named t 2 t 1 t 1 and t 2 Within the first limit t 1 Ti t 1 the wireless module is in the normal working range the Safe Area In the Warning Area t 2 Ti t 1 or t 1 Ti t 2 the wireles...

Страница 115: ...Yes Send shutdown notification Feature enabled full logic or indication only IF Full Logic Enabled Feature disabled no action Temperature is within normal operating range Yes Tempetature is within war...

Страница 116: ...41 Symbol Parameter Temperature Remarks t 2 Low temperature shutdown 40 C Equal to the absolute minimum temperature rating for the wireless module the lower limit of the extended temperature range t 1...

Страница 117: ...ure 217 C Stencil Thickness 120 m for base boards The final choice of the soldering paste depends on the approved manufacturing procedures The paste mask geometry for applying soldering paste should m...

Страница 118: ...ture fall rate max 4 C s To avoid falling off modules should be placed on the topside of the motherboard during soldering The final soldering temperature chosen at the factory depends on additional ex...

Страница 119: ...2 5 Repeated reflow soldering Only a single reflow soldering process is encouraged for boards with a LISA U1 series module populated on it The reason for this is the risk of the module falling off du...

Страница 120: ...other forms of metal strips directly onto the EMI covers is done at the customer s own risk The numerous ground pins should be sufficient to provide optimum immunity to interferences and noise u blox...

Страница 121: ...ed in detail to improve the production quality This is achieved with automatic test equipment which delivers a detailed test report for each unit The following measurements are done Digital self test...

Страница 122: ...ata Terminal Equipment DTM Dual Transfer Mode DTR Data Terminal Ready EBU External Bus Interface Unit EDGE Enhanced Data rates for GSM Evolution E GPRS Enhanced GPRS FDD Frequency Division Duplex FEM...

Страница 123: ...Indicator RTC Real Time Clock RTS Request To Send RXD RX Data SAW Surface Acoustic Wave SIM Subscriber Identification Module SMS Short Message Service SMTP Simple Mail Transfer Protocol SPI Serial Per...

Страница 124: ...measurement techniques Electrostatic discharge immunity test 11 ETSI EN 301 489 1 V1 8 1 Electromagnetic compatibility and Radio spectrum Matters ERM ElectroMagnetic Compatibility EMC standard for ra...

Страница 125: ...Europe Middle East Africa u blox AG Phone 41 44 722 74 44 E mail info u blox com Support support u blox com Asia Australia Pacific u blox Singapore Pte Ltd Phone 65 6734 3811 E mail info_ap u blox com...

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