TVP4020
Programmers Reference Manual
Graphics Programming
65
For efficiency, the Render command register has a number of bit fields
that can be set or cleared per render operation, and which qualify other
state information within P
ERMEDIA
. These bits are AreaStippleEnable,
TextureEnable, FogEnable, ReuseBitMask and SubpixelCorrection.
One use of this feature can occur when a window is cleared to a
background color. For normal 3D primitives, stippling and fog operations
may have been enabled, but these are to be ignored for window clears.
Say that initially the FogMode and AreaStippleMode registers are
enabled through the unit Enable bits. Now bits need only be set or
cleared within the Render command to achieve the required result,
removing the need to load the FogMode and AreaStippleMode registers
for every Render operation.
The bit fields of the Render command register are detailed as follows:
Bit No.
Name
Description
0
AreaStippleEnable
Enable area stippling.
1, 2
Reserved
3
FastFillEnable
Enable fast fill using VRAM block mode.
4, 5
Reserved
6, 7
PrimitiveType
Set type of primitive:
0 = line
1 = trapezoid
2 = point
3 = rectangle
8, 9, 10
Reserved
11
SyncOnBitMask
Enable bitmask test. Wait for new bitmask
when current one expires unless
SyncOnHostData or ReuseBitmask enabled.
12
SyncOnHostData
Wait for host data before sending step
message.
13
TextureEnable
Enable texturing.
14
FogEnable
Enable fog.
15
Reserved
16
SubPixelCorrectionEnable
Enable sub-pixel correction.
17
ReuseBitMask
Reuse bitmask when last bit used.
18, 19
Reserved
20
RejectNegativeFace
Used by Delta unit.
21
IncreaseX
Direction of fill for rectangle
22
IncreaseY
Direction of fill for rectangle
Table 5.6
Render Command Register Fields
Содержание TVP4020 PERMEDIA 2
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