Programming Model
TVP4020
Programmers Reference Manual
12
function can be loaded into a single DMA buffer then the driver function
can return. Meanwhile, in parallel, P
ERMEDIA
is reading data from the
host buffer and loading it into its FIFO. FIFO overflow never occurs since
the DMA controller automatically waits until there is room in the FIFO
before doing any transfers.
The only restriction on the use of DMA control registers is that before
attempting to reload the DMACount register the host software must wait
until previous DMA has completed. It is valid to load the DMAAddress
register while the previous DMA is in progress since the address is
latched internally at the start of the DMA transfer. Many display driver
functions can be implemented using the following skeleton structure:
do any pre-work
DMAAddress(address of dma_buffer);
while (TRUE) {
count = *DMACount;
// note this is volatile
if (count) {
while (--count)
;
// wait for count to expire
}
else
break;
// DMA completed
}
copy render data into DMA buffer
DMACount(number of words in DMA buffer)
return
Using DMA leaves the host free to return to the application, while in
parallel, P
ERMEDIA
is performing the DMA and drawing. This can increase
performance significantly over loading a FIFO directly. In addition, some
algorithms require that data be loaded multiple times (e.g. drawing the
same object across multiple clipping rectangles). Since the P
ERMEDIA
DMA only reads the buffer data, it can be downloaded many times
simply by restarting the DMA. This can be very beneficial if composing
the buffer data is a time consuming task.
A further optimization is to use a double buffered mechanism with two
DMA buffers. This allows the second buffer to be filled before waiting for
the previous DMA to complete thus further improving the parallelism
between host and P
ERMEDIA
processing.
Содержание TVP4020 PERMEDIA 2
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Страница 292: ...TVP4020 Programmers Reference Manual Register Tables 283 ...
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