Memory I/O and Organization
TVP4020
Programmers Reference Manual
34
internal timing generator this is controlled by the
ScreenBase register
located in the P
ERMEDIA
control space at offset 0x3000.
P
ERMEDIA
Rendering
When determining the memory location of a pixel being rendered,
P
ERMEDIA
operates in screen coordinates.
To simplify the calculation of pixel coordinates that are loaded into
P
ERMEDIA
, this value may be loaded into the FBPixelOffset register. The
last thing P
ERMEDIA
does before passing a pixel address to the
framebuffer interface is to add the value in the FBPixelOffset register to
its address. Thus it is possible to move the rendering origin to any pixel
location in memory. When swapping buffers it is normal to move this
position to be the pixel at which a given buffer starts.
These values can be pre-calculated at system start-up ready to be
loaded as required.
Synchronization
Double buffering allows the displaying of one buffer (the front buffer)
whilst rendering into the other (the back buffer). When the rendering has
been completed to the back buffer, the buffers are swapped and
rendering continues into the new back buffer. As a general rule, buffers
should not be swapped until all rendering to the back buffer has
completed so that the buffer swap does not result in visible tearing, or
screen break-up.
P
ERMEDIA
reads the
ScreenBase register at the end of each vertical
blanking period to determine the starting pixel for the next frame to be
displayed. Thus, in principle, this register can be written at any time to
swap buffers and will only take effect on the next frame. The same is not
true of loading the FBPixelOffset register. This register gets updated as
soon as the command to load it works its way through the input FIFO.
Hence, any rendering that takes place after the FBPixelOffset has been
loaded will occur in the new buffer. If care is not taken, this can result in
rendering being seen before the buffers have been swapped. The
following scheme would probably produce picture break-up:
ScreenBase = Buf0_Addr
// display buffer 0
FBPixelOffset = Buf1_Offset
// draw to buffer 1 now
Render Commands
// draw next frame
ScreenBase = Buf1_Addr
// display buffer 1
FBPixelOffset = 0
// draw to buffer 0 now
Render Commands
// draw next frame
There are two problems here. Firstly, even though the write to the
ScreenBase register happens immediately, P
ERMEDIA
does not actually
swap the buffers till the end of the next vertical blanking period. Thus the
start of rendering of the next frame may be seen in the front buffer prior
Содержание TVP4020 PERMEDIA 2
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Страница 47: ...Memory I O and Organization TVP4020 Programmers Reference Manual 38 Texture address TextureBaseAddress T W S ...
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