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14
Rev. 0.9
6. Timing
6.1. Command and Property Timing
When the user reads a response over the I
2
C bus, the first 8 bits returned are the STATUS register. Bit 7 of the
STATUS register is the CTS bit (Clear to Send). When CTS is 1, it indicates that the chip is ready to receive a new
command. Seek and Tune commands may take longer to complete than most other commands, so they also use
the STC bit (Seek/Tune Complete) to indicate they have completed. STC is bit 0 of the STATUS register.
When the user sends any command, the CTS bit will immediately reset to 0. CTS will remain 0 while the chip
processes the command. When the chip is finished processing the command, the CTS bit will be set back to 1.
Before sending another command, the user may poll CTS by reading the first byte of response until CTS = 1. If the
user has enabled the optional CTS interrupt, then the INTB pin will pulse low immediately after CTS has been set
to 1, to notify the user that the previous command has completed. For information on how to enable the CTS
interrupt, see the INT_CTL_ENABLE property and CTSIEN bit in the arguments for the POWER_UP command.
The commands for seek and tune (FM_TUNE_FREQ, FM_SEEK_START, etc.) will cause CTS to reset to 0 for a
short time, but they will set CTS back to 1 after the seek or tune has started. The seek or tune is progressing even
though CTS has been set back to 1. Although the user is free to send another command at this time, it is highly
recommended to wait until the STC (Seek/Tune Complete) bit has been set to 1 before sending another command.
The only exception is the AM/FM_RSQ_STATUS command, which may be sent at any time because it can be used
to cancel the seek/tune in progress and check the status of which station seek is currently on.
When the seek/tune completes, the STC bit will be set to 1. The user may poll STC by reading the first byte of
response until STC = 1. If the user has enabled the optional STC interrupt, then the INTB pin will pulse low
immediately after STC has been set to 1, to notify the user that the seek or tune has completed. For information on
how to enable the STC interrupt, see the INT_CTL_ENABLE property.
After the seek or tune has completed, the user may acknowledge the completion by sending the AM/
FM_RSQ_STATUS command with the STCACK bit set to 1. This will reset the STC bit back to 0. After this, the
user may send another seek or tune command. Alternatively a new seek or tune command will also clear the STC
bit when it begins.
Figure 4 shows a seek or tune command with the optional CTS and STC interrupts enabled. The timing parameters
are shown in Table 3.
Figure 4. CTS and STC Timing Model
Command
FM_TUNE_FREQ
Control
Bus
t
STC
t
INT
CTS
Bit
STC
Bit
Command
FM_RSQ_STATUS
INTB
t
CTS
