S3C2500B
SERIAL I/O (HIGH-SPEED UART)
14-15
[0] Receive Data Valid Interrupt Enable (RDVIE)
[1] Break Signal Detected Interrupt Enable (BKDIE)
[2] Frame Error Interrupt Enable (FERIE)
[3] Parity Error Interrupt Enable (PERIE)
[4] Overrun Error Interrupt Enable (OERIE)
[5] Control Character Detect Interrupt Enable (CCDIE)
[6] Data Carrier Detect Lost Interrupt Enable (DCDLIE)
[7] Receive FIFO Data Trigger Level Reach Interrupt Enable (RFREAIE)
[9:8] Reserved
[10] Receive FIFO overrun Interrupt Enable (OVFFIE)
[11] Reserved
[12] Receive Event Time out Interrupt Enable (E_RxTOIE)
[13] AutoBaud Rate Detection done interrupt enable (AUBDDNIE)
[15:14] Reserved
[16] CTS event occured Interrupt Enable (E_CTSIE)
[17] Transmitter Idle (TIIE)
[18] Transmit Holding Register Empty Interrupt Enable (THEIE)
This bit used in FIFO mode for interrupt enable when transmit
FIFO empty as much transmit data trigger level.
[31:19] Reserved
31
0
3
4
5
1
2
19
15
10 9
18 17 16
13 12 11
8
7
6
C
C
D
I
E
O
E
R
I
E
E
_
R
X
T
O
I
E
T
H
E
I
E
E
_
C
T
S
I
E
R
F
R
E
A
I
E
D
C
D
L
I
E
F
E
R
I
E
R
D
V
I
E
B
K
D
I
E
P
E
R
I
E
O
V
F
F
I
E
T
I
I
E
14
A
U
B
D
D
N
I
E
Figure 14-4. High-Speed UART Interrupt Enable Register
Содержание S3C2500B
Страница 2: ...S3C2500B 32 BIT RISC MICROPROCESSOR USER S MANUAL Revision 1 ...
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Страница 80: ...PRODUCT OVERVIEW S3C2500B 1 46 NOTES ...
Страница 296: ...MEMORY CONTROLLER S3C2500B 5 60 NOTES ...
Страница 531: ...GDMA CONTROLLER S3C2500B 12 24 NOTES ...
Страница 593: ...I O PORTS S3C2500B 15 12 NOTES ...