R8C/1A Group, R8C/1B Group
14. Timers
Rev.1.30
Dec 08, 2006
Page 113 of 315
REJ09B0252-0130
14.1.2
Pulse Output Mode
In pulse output mode, the internally generated count source is counted, and a pulse with inverted polarity is
output from the CNTR0 pin each time the timer underflows (refer to
Table 14.3 Pulse Output Mode
Specifications
). Figure 14.5 shows the TXMR Register in Pulse Output Mode.
NOTE:
1. The level of the output pulse becomes the level when the pulse output starts when the TX register is
written to.
Table 14.3
Pulse Output Mode Specifications
Item
Specification
Count sources
f1, f2, f8, fRING
Count operations
• Decrement
• When the timer underflows, the contents of the reload register are reloaded
and the count is continued.
Divide ratio
1/(n+1)(m+1) n: value set in PREX register, m: value set in TX register
Count start condition
1 (count starts) is written to the TXS bit in the TXMR register.
Count stop condition
0 (count stops) is written to the TXS bit in the TXMR register.
Interrupt request
generation timing
When timer X underflows [timer X interrupt].
INT10/CNTR00
pin function
Pulse output
CNTR0 pin function
Programmable I/O port, or inverted output of CNTR0
Read from timer
The count value can be read out by reading registers TX and PREX.
Write to timer
• When registers TX and PREX are written while the count is stopped, values
are written to both the reload register and counter.
• When registers TX and PREX are written during the count, the value is written
to each reload register of registers TX and PREX at the following count source
input, the data is transferred to the counter at the second count source input,
and the count re-starts at the third count source input.
Select functions
• INT1/CNTR0 signal polarity switch function
The R0EDG bit can select the polarity level when the pulse output starts.
(1)
• Inverted pulse output function
The pulse which inverts the polarity of the CNTR0 output can be output from
the CNTR0 pin (selected by TXOCNT bit).
