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M16C/62P Group (M16C/62P, M16C/62PT)
5. Reset
Rev.2.41
Jan 10, 2006
Page 43 of 390
REJ09B0185-0241
5.3
Software Reset
The microcomputer resets pins, the CPU and SFR when the PM03 bit in the PM0 register is set to “1”
(microcomputer reset). Then the microcomputer executes the program in an address determined by the reset vector.
Set the PM03 bit to “1” while the main clock is selected as the CPU clock and the main clock oscillation is stable.
In the software reset, the microcomputer does not reset a part of the SFR. Refer to
4. Special Function Register
(SFR)
for details.
Processor mode remains unchanged since the PM01 to PM00 bits in the PM0 register are not reset.
5.4
Watchdog Timer Reset
The microcomputer resets pins, the CPU and SFR when the CM06 bit in the CM0 register is set to “1” (reset) and
the watchdog timer underflows. Then the microcomputer executes the program in an address determined by the
reset vector.
In the watchdog timer reset, the microcomputer does not reset a part of the SFR. Refer to
4. Special Function
Register (SFR)
for details. Processor mode remains unchanged since the PM01 to PM00 bits in the PM0 register
are not reset.
5.5
Oscillation Stop Detection Reset
The microcomputer resets and stops pins, the CPU and SFR when the CM27 bit in the CM2 register is 0, if it
detects main clock oscillation circuit stop. Refer to
10.6 Oscillation Stop and Re-oscillation Detect Function
for
details.
In the oscillation stop detection reset, the microcomputer does not reset a part of the SFR. Refer to
4. Special
Function Register (SFR)
for details. Processor mode remains unchanged since the PM01 to PM00 bits in the
PM0 register are not reset.
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