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M16C/62P Group (M16C/62P, M16C/62PT)
22. Flash Memory Version
Rev.2.41
Jan 10, 2006
Page 271 of 390
REJ09B0185-0241
NOTES:
1. The PM13 bit remains set to “1” while the FMR01 bit in the FMR0 register = 1 (CPU rewrite mode enabled). The
PM13 bit is reverted to its original value by clearing the FMR01 bit to “0” (CPU rewrite mode disabled).
However, if the PM13 bit is changed during CPU rewrite mode, its changed value is not reflected until after the
FMR01 bit is cleared to “0”.
2. When in CPU rewrite mode, the PM10 and PM13 bits in the PM1 register are set to “1”. The rewrite control
program can only be executed in the internal RAM or in an external area that is enabled for use when the PM13
bit = 1. When the PM13 bit = 0 and the flash memory is used in 4-Mbyte mode, the extended accessible area
(40000h to BFFFFh) cannot be used.
Table 22.2
Flash Memory Rewrite Modes Overview
Flash Memory
Rewrite Mode
CPU rewrite Mode
(1)
Standard Serial I/O Mode
Parallel I/O Mode
Function
The User ROM area is rewritten when
the CPU executes software commands.
EW0 mode:
Rewrite in areas other than flash
memory
(2)
EW1 mode:
Can be rewritten in the flash memory
The user ROM area is
rewritten using a dedicated
serial programmer.
Standard serial I/O mode 1:
Clock synchronous serial I/O
Standard serial I/O mode 2:
UART
The boot ROM area and
user ROM area is rewritten
using a dedicated parallel
programmer.
Areas which
can be
Rewritten
User ROM area
User ROM area
User ROM area
Boot ROM area
Operating
Mode
Single-chip mode
Memory expansion mode (EW0 mode)
Boot mode (EW0 mode)
Boot mode
Parallel I/O mode
ROM
Programmer
None
Serial programmer
Parallel programmer
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