Quectel 5G Module Series, Проектирование аппаратного обеспечения

Страница: 21 / 86

5G Module Series
RM500Q-GL Hardware Design
RM500Q-GL_Hardware_Design 20 / 85
5 GND Ground
6
FULL_CARD_
POWER_OFF#
DI
Turn on/off of the
module.
High level: Turn on
Low level: Turn off
V
IH
max = 4.4 V
V
IH
min = 1.19 V
V
IL
max = 0.2 V
Internally pulled
down with a 100
k
Ω resistor
7 USB_DP AIO
USB 2.0 differential
data (+)
8 W_DISABLE1# DI, OD
Airplane mode control.
Active LOW.
1.8/3.3 V
9 USB_DM AIO
USB 2.0 differential
data (-)
10 WWAN_LED# DO, OD
RF status indication
LED
Active LOW
11 GND Ground
12 Notch Notch
13 Notch Notch
14 Notch Notch
15 Notch Notch
16 Notch Notch
17 Notch Notch
18 Notch Notch
19 Notch Notch
20 PCM_CLK DIO, PD PCM data bit clock 1.8 V
21 CONFIG_0 DO
Not connected
internally
22 PCM_DIN DI PCM data input 1.8 V
23 WAKE_ON_WAN# DO, OD
Wake up the host.
Active LOW
1.8/3.3 V
24 PCM_DOUT DO, PD PCM data output 1.8 V
25 DPR* DI, PU
Dynamic power
reduction.
High level by default
1.8 V