5G Module Series
RM500Q-GL Hardware Design
RM500Q-GL_Hardware_Design 18 / 85
2.5. Pin Assignment
The following figure shows the pin assignment of RM500Q-GL. The top side contains the four antenna
connectors.
PIN2
PIN74
BOT
PIN1
PIN75
TOP
Pin Name
No.
CONFIG_2
75
GND
73
GND
71
CONFIG_1
69
RESET#
67
RFFE_VIO_1V8
65
ANTCTL2
63
ANTCTL1
61
LAA_TX_EN
59
GND
57
PCIE_REFCLK_P
55
PCIE_REFCLK_M
53
GND
51
PCIE_RX_P
49
PCIE_RX_M
47
GND
45
PCIE_TX_P
43
PCIE_TX_M
41
GND
39
USB_SS_RX_P
37
USB_SS_RX_M
35
GND
33
USB_SS_TX_P
31
USB_SS_TX_M
29
GND
27
DPR
25
WAKE_ON_WAN#
23
CONFIG_0
21
Notch
Notch
Notch
Notch
GND
11
USB_DM
9
USB_DP
7
GND
5
GND
3
CONFIG_3
1
PIN11
PIN10
No.
Pin Name
74
VCC
72
VCC
70
VCC
68
AP2SDX_STATUS
66
USIM1_DET
64
COEX_TXD
62
COEX_RXD
60
WLAN_TX_EN
58
RFFE_DATA
56
RFFE_CLK
54
PCIE_WAKE_N
52
PCIE_CLKREQ_N
50
PCIE_RST_N
48
USIM2_VDD
46
USIM2_RST
44
USIM2_CLK
42
USIM2_DATA
40
USIM2_DET
38
SDX2AP_STATUS
36
USIM1_VDD
34
USIM1_DATA
32
USIM1_CLK
30
USIM1_RST
28
PCM_SYNC
26
W_DISABLE2#
24
PCM_DOUT
22
PCM_DIN
20
PCM_CLK
Notch
Notch
Notch
Notch
10
WWAN_LED#
8
W_DISABLE1#
6
FULL_CARD_POWER_OFF#
4
VCC
2
VCC
Figure 2: Pin Assignment