EN 120
HDRW720/0x, DVDR725H/0x
7.
Circuit Diagrams and PWB Layouts
Digital Board Chrysalis F: 1394
TESTPIN
GND
VDD
RESERVED
DVDD
AVDD
NC
PLLGND
DGND
AGND
DECODER/
BIAS
DATA
INTERFACE
LINK
RECEIVED
CONTROL
STATE
MACHINE
LOGIC
TRANSMIT
CLOCK
PLL
XTAL OSC.
ENCODER
DATA
GENERATOR
CURRENT
AND
VOLTAGE
TEST1
TEST0
C|LKON
ISO_
LPS
CPS
PLLVDD
R0
R1
TPBIAS0
TPA0+
TESTM
TPA0-
TPB0+
TPB0-
XI
XO
TIMER
ARBITR’N
AND
PD
RESET_
CNA
PC2
PC1
PC0
D7
D6
D5
D4
D3
D2
D1
D0
CTL1
CTL0
LREQ
SYSCLK
not used
1%
I221 F12
I222 C7
I223 F12
I224 G8
I225 C7
I226 C7
I227 C7
DV IN
not used
not used
1%
I207 A3
I208 A3
I209 B3
I210 C2
I211 B7
I212 B7
I213 D6
I214 D6
I215 A6
I216 B6
I217 A8
1%
not used
not used
F209 C12
F210 C13
F211 B13
F212 B12
F213 B12
F214 C12
F215 C12
F216 C12
F217 C12
I200 H4
I201 F2
1%
BOARD_ID
PHY
not used
I205 G11
I206 G4
5204 I1
6200 G4
7200 A5
7201 A11
7202 H5
F1201 B2
F1202 B2
F1203 B1
F1204 B2
F1205 B2
F200 C12
I218 C7
I219 C7
I220 F12
F205 C12
F206 C13
F207 C13
F208 C12
3296 F12
3297 E8
3298 F8
3299 F8
3314 F13
3315 F8
3316 F8
3317 F8
3318 F8
3319 F8
4201 D6
I202 G2
I203 H2
I204 I2
LINK
4205 A4
5200 F2
5201 F4
5202 G2
5203 H2
3274 F12
3275 G5
3276 G7
3277 F12
3278 F12
3279 F12
3280 A7
3281 A7
3282 A8
3283 A2
3284 A8
F201 C9
F203 C3
F204 C13
3288 H13
3289 H13
3290 I13
3291 I13
3292 I13
3293 I13
3294 F12
3295 F12
3257 E12
3258 E12
3259 E12
3260 F12
3261 E3
3262 F7
3263 F7
3264 F7
3265 F7
3266 F7
3267 F7
4202 D6
4203 G12
4204 G12
1%
not used
3271 F12
3272 F12
3273 G8
3236 C7
3237 D12
3238 C7
3239 D12
3240 C2
3241 D12
3242 C7
3243 D12
3244 D12
3245 D7
3246 D12
3285 A6
3286 H13
3287 H13
3250 E12
3251 D12
3252 E12
3253 D2
3254 E12
3255 E12
3256 E12
3217 C12
3218 C12
3219 C12
3220 B7
3221 C12
3222 C12
3223 B7
3224 C12
3225 C7
3226 C12
3227 C12
3268 F7
3269 G7
3270 F12
3231 C7
3232 C2
3233 C2
3234 C7
3235 C13
2228 I5
2229 I5
2230 I5
2231 I6
2232 I6
2233 I6
2234 I6
2235 A5
2236 A9
2237 B6
3200 E6
3247 D12
3248 D7
3249 D12
3205 A2
3206 A7
3207 A8
3208 B7
3209 B8
3210 B12
3211 B12
3212 B2
3213 B3
3214 B12
3215 C12
3216 B7
1
2
3
4
5
6
7
8
9
10
11
3228 C7
3229 C12
3230 C12
1%
2210 G2
2212 H1
2214 H2
2215 H2
2217 I2
2218 I2
2219 I2
2220 I2
2221 I3
2222 I3
2223 I3
2224 I4
2225 I4
2226 I4
2227 I4
G
H
I
1201 D1
1203 B1
2200 B2
2201 C2
2202 D1
2203 D2
2204 D2
2205 D2
3202 F12
3203 H5
3204 D6
22R for C3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
2206 G3
2207 F2
2208 G3
220R for C3
220R for C3
not used
12
13
14
2209 G2
A
B
C
D
E
F
G
H
I
A
B
C
D
E
F
33R
3239
1u0
2200
4K7
3259
F215
F214
2226
I220
3256
4K7
100n
F203
F209
3234
10R
4K7
3293
I202
2223
100n
33R
3249
3202
100R
4201
3260
100R
I214
3276
1K0
56R
F211
3213
1201
24M576
4K7
3288
I223
10R
3225
33R
3215
33R
3218
3263
4K7
4205
3261
1R0
100R
3270
2202
12p
3250
4K7
10K
3280
3286
4K7
3271
100R
F217
I226
F212
3228
10R
100R
3315
100n
2224
I201
3231
10R
4u7
2208
F205
35V
3207
10K
I200
3254
33R
F207
F204
3211
33R
1
2
3
4
5
6
1203
SR
3299
100R
3298
100R
3267
4K7
I204
I206
2221
100n
2222
100n
F200
100R
3316
3278
100R
3262
4K7
33R
3210
100n
4204
2218
22K
3258
10K
3281
2215
3238
100n
24
35
44
54
61
70
10R
84
90
95
107
113
120
132
138
12
18
71
9
104
RESET_
42
SCLK
88
1
62
2
63
3
64
6
78
17
130
2
50
3
51
4
52
5
58
6
59
7
72
8
1
49
10
65
11
66
12
67
13
68
14
105
15
129
16
144
PHYD0
82
PHYD1
81
PHYD2
80
PHYD3
79
PHYD4
76
PHYD5
75
PHYD6
74
PHYD7
73
37
HIFWR_
ISON
93
LINKON
92
LPS
91
LREQ
LREQ
87
PD
48
PHYCTL0
86
PHYCTL1
85
1
HIFD8
10
HIFD9
9
HIFINT_
38
HIFMUX
46
40
HIFRD_
36
HIFSC_
HIFWAIT
41
HIFAD7
13
HIFALE
39
HIFD10
8
HIFD11
7
HIFD12
4
HIFD13
3
HIFD14
2
HIFD15
HIFA8
25
HIFAD0
22
HIFAD1
21
HIFAD2
20
HIFAD3
19
HIFAD4
16
HIFAD5
15
HIFAD6
14
HIFA0
33
HIFA1
32
HIFA2
31
HIFA3
30
HIFA4
29
HIFA5
28
HIFA6
27
HIFA7
26
131
137
11
17
23
34
43
53
60
69
HIF16BIT
45
CYCLEIN
56
CYCLEOUT
57
5
77
83
89
94
106
112
119
AV2ERR0|LTLEND
121
122
AV2ERR1|DATINV
AV2FSYNC
125
AV2READY
143
AV2SY
126
AV2SYNC
128
AV2VALID
127
CLK50
55
AV2D1
134
AV2D2
135
AV2D3
136
AV2D4
139
AV2D5
140
AV2D6
141
AV2D7
142
AV2ENDPCK
123
AV1ERR1
97
AV1FSYNC
100
AV1READY
118
AV1SY
101
AV1SYNC
103
AV1VALID
102
AV2CLK
124
AV2D0
133
AV1D2
110
AV1D3
111
AV1D4
114
AV1D5
115
AV1D6
116
AV1D7
117
AV1ENDPCK
98
AV1ERR0
96
7201
PDI1394L40
1394MODE
47
AV1CLK
99
AV1D0
108
AV1D1
109
LINK
CORE
AND
STATUS
CONTROL
REGISTERS
AND
ASYNC
RECEIVER
8-BIT
TRANSMITTER
MEMORY
PACKETS
12KB BUFFER
INTERFACE
ISOCH & ASYNC
TRANSMITTER / RECEIVER
AV2
TRANSMITTER / RECEIVER
AV1
I218
I209
3203
10K
F1201
I215
1R0
3253
2233
100n
100n
3295
2232
100R
2237
100n
F1205
3236
10R
5203
33R
3224
82R
3241
4203
100n
2228
10R
3248
I221
I212
3204
10K
33R
3227
100n
2204
5201
I225
3287
4K7
10R
3216
I211
3285
10R
I210
3223
10R
2209
2201
270p
100n
3237
33R
6K34
3205
33R
3252
3222
33R
10K
3200
3296
100R
100R
3294
I203
3289
4K7
100n
2217
3209
1R0
3247
33R
2225
100n
100n
2236
100R
3319
3246
33R
3235
10K
3219
10K
3217
33R
3318
100R
3226
33R
10R
3245
6200
TLMH3100
100n
2206
3275
330R
2234
2
29
28
27
37
36
35
34
38
59
60
100n
20
21
22
14
57
58
56
40
41
53
15
1
54
55
16
43
44
45
46
47
13
17
18
63
64
25
26
61
62
23
24
4
5
19
6
7
8
9
10
11
12
39
48
49
50
30
31
42
51
52
3
PDI1394P25
PDI1394P25
7200
32
33
F1203
F201
I205
10K
3230
3292
4K7
5202
1R0
3284
F206
2214
100n
F1202
4202
F1204
100R
3274
3279
100R
100R
3277
4K7
3264
2220
100n
I222
100n
2219
F213
3243
33R
3257
22K
2203
12p
3212
56R
4K7
3255
10K
3314
3265
4K7
3273
10R
5200
3283
10K
3269
4K7
I207
I213
I216
4K7
3266
10K
3208
7202
PDTC144EU
F208
4K7
3291
1n0
2235
100n
2231
F216
3232
56R
10K
3282
I224
100u
2212
I208
100n
2229
2230
100n
4K7
3290
I219
I227
I217
100n
3233
56R
2227
3251
33R
3242
10R
100n
2205
F210
3214
33R
100R
3272
3229
33R
4K7
3268
3240
5K1
100n
2210
3220
10R
5204
33R
3221
100n
2207
3317
100R
100R
3297
3206
10K
33R
3244
+3V3_LINK
XIO_SEL1
PCI_AD(4)
PCI_AD(3)
PCI_AD(2)
PCI_AD(1)
PCI_AD(0)
RESET_1394n
MX_D_CTL
L_CLK
L_VAL
L_SYNC
L_FSYNC
PCI_AD(31:0)
PCI_AD(8)
PCI_AD(7)
PCI_AD(6)
PCI_AD(5)
+3V3_IEEE_A
PCI_AD(31:0)
PCI_AD(31)
PCI_AD(30)
PCI_AD(29)
PCI_AD(28)
PCI_AD(27)
PCI_AD(26)
PCI_AD(25)
PCI_AD(24)
+3V3_IEEE_PLL
MPIO21_1394_POWERDOWN
+3V3_IEEE_D
+3V3_IEEE_D
L_D_CTL
MPIO9_BOARD_ID_0
MPIO10_BOARD_ID_1
MPIO11_BOARD_ID_2
MPIO12_BOARD_ID_3
+3V3_IEEE_D
MPIO8_1394_CNA
+3V3_LINK
+3V3_IEEE_D
+3V3_IEEE_D
+3V3_IEEE_PLL
+3V3_IEEE_A
+3V3
L_D(2)
MX_D(7)
MX_D(7:0)
MX_VAL
MX_SYNC
MX_CLK
+3V3_LINK
AV1ENDPCK
MPIO23_1394_LED
+5V
+3V3_LINK
MPIO2_1394_IRQn
MX_D(0)
MX_D(1)
MX_D(2)
MX_D(3)
MX_D(4)
MX_D(5)
MX_D(6)
L_D(7:0)
L_D(7)
L_D(6)
L_D(5)
L_D(4)
L_D(3)
L_D(1)
L_D(0)
+3V3_LINK
+3V3_IEEE_D
+3V3_IEEE_D
+3V3_LINK
+3V3_LINK
+3V3
+3V3
+3V3_LINK
+3V3_LINK
+3V3_LINK
PCI_CBE(1)
PCI_CBE(2)
TR 17033_001
090304
1.5V
1.7V
A: DC, 1 V/Div, 20ns/Div
IC7200 pin 60, F203
Содержание DVDR725H
Страница 5: ...Technical Specifications and Connection Facilities EN 5 HDRW720 0x DVDR725H 0x 1 1 12 PCB Locations ...
Страница 148: ...EN 148 HDRW720 0x DVDR725H 0x 7 Circuit Diagrams and PWB Layouts ...
Страница 171: ...Circuit IC descriptions and list of abbreviations EN 171 HDRW720 0x DVDR725H 0x 9 Figure 9 11 ...
Страница 172: ...Circuit IC descriptions and list of abbreviations EN 172 HDRW720 0x DVDR725H 0x 9 Figure 9 12 ...
Страница 193: ...Circuit IC descriptions and list of abbreviations EN 193 HDRW720 0x DVDR725H 0x 9 ...
Страница 211: ...Revision List EN 211 HDRW720 0x DVDR725H 0x 11 11 Revision List 11 1 3122 785 14281 Aug 30th 2004 Added DVDR725H ...