NXP Semiconductors MPC5602S, Справочное руководство

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Register Map
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1299
STM Channel 3 Compare Register STM_CMP3 32-bit Base + 0x0048
Reserved — — Base +
(0x003C–0x3FF)
ECSM Section 16.4, Memory map and register description 0xFFF4_0000
Processor Core Type ECSM_PCT 16-bit Base + 0x0000
SOC-Defined Platform Revision ECSM_PLREV 16-bit Base + 0x0002
Reserved — — Base +
(0x0004–0x0007)
IPS On-Platform Module Configuration ECSM_IOPMC 32-bit Base + 0x0008
Reserved — — Base +
(0x000C–0x000E
)
Miscellaneous Reset Status Register ECSM_MRSR 8-bit Base + 0x000F
Reserved — — Base +
(0x00010–0x001)
Miscellaneous Wakeup Control Register ECSM_MWCR 8-bit Base + 0x0013
Reserved — — Base +
(0x0014–0x001E)
Miscellaneous Interrupt Register ECSM_MIR 8-bit Base + 0x001F
Reserved — — Base +
(0x0020–0x0023)
Miscellaneous User Defined Control Register ECSM_MUDCR 32-bit Base + 0x0024
Reserved — — Base +
(0x0028–0x0042)
ECC Configuration Register ECSM_ECR 8-bit Base + 0x0043
Reserved — — Base +
(0x0044–0x0046)
ECC Status Register ECSM_ESR 8-Base
bit
Base + 0x0047
Reserved — — Base +
(0x0048–0x0049)
ECC Error Generation Register ECSM_EEGR 16-bit Base + 0x004A
Reserved — — Base +
(0x004C–0x004F)
Platform Flash ECC Error Address Register ECSM_PFEAR 32-bit Base + 0x0050
Reserved — — Base +
(0x054–0x0055)
Table B-2. Detailed register map (continued)
Register description Register Name
Used
Size
Address