NEC uPD72257, Предварительное руководство пользователя

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Chapter 9 External Memory Interface Controller
Indices Throughout this chapter following indices are used:
• n = 0 to 1: numbers the chip select signals MCS0 and MCS1 and
their dedicated registers
• k = 0 to 3: numbers the three different static memory timing
parameter sets
Register base
addresses
All Memory Controller register addresses are given as address offsets to the base
address <MemC_Base>.
The <MemC_Base> address of the Memory Controller is given in the following
table:
Memory Controller <MemC_Base> address
MemC
0000 3000
H
Ravin-M pin
functions
The availability of external memory interface signals at external pins depend on
the selected Ravin-M pinout option.
Table 9-1 Ravin-M external memory I/F pinout options
Bus Signal
Ravin-M option
1, 9 2, 7e 3 6 7a, 7b 7c 7d
Shared
MA[12:0] √ √ √ √ √ √ √
MA[15:13] – √ √ – √ √ √
MA[23:16] – √ √ – √ – √
MA24 – √ √ – √ – –
MD[15:0] √ √ √ √ √ √ √
MD[31:16] √ – √ – √ √ √
MCS0 √ √ √ √ √ √ √
MCS1 – √ √ – √ √ √
SDRAM
MDBA[1:0] √ √ √ √ √ √ √
MDDQM0 √ √ √ √ √ √ √
MDDQM1 √ √ √ √ √ √ √
MDDQM2 √ – √ – √ √ √
MDDQM3 √ – √ – √ √ √
MDRAS √ √ √ √ √ √ √
MDCAS √ √ √ √ √ √ √
MDWE √ √ √ √ √ √ √
MDCKE √ √ √ √ √ √ √
MDCLK √ √ √ √ √ √ √
MDFBCLK √ √ √ √ √ √ √
MDA10PC √ √ √ √ √ √ √
Static
memory
MSOE – √ √ – √ √ √
MSWR – √ √ – √ √ √
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Preliminary User's Manual S19203EE1V3UM00