National Instruments cDAQ-9133, Руководство пользователя

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NI cDAQ-9132/9133/9134/9135/9136/9137 User Manual
Single Pulse Generation with Start Trigger
The counter can output a single pulse in response to one pulse on a hardware Start Trigger signal.
The pulse appears on the Counter
n Internal Output signal of the counter.
You can specify a delay from the Start Trigger to the beginning of the pulse. You also can specify
the pulse width. The delay is measured in terms of a number of active edges of the Source input.
You can specify a pulse width. The pulse width is also measured in terms of a number of active
edges of the Source input. You can also specify the active edge of the Source input (rising and
falling).
Figure 5-27 shows a generation of a pulse with a pulse delay of four and a pulse width of three
(using the rising edge of Source).
Figure 5-27. Single Pulse Generation with Start Trigger
Pulse Train Generation
Refer to the following sections for more information about the cDAQ controller pulse train
generation options:
•
Finite Pulse Train Generation
• Retriggerable Pulse or Pulse Train Generation
• Continuous Pulse Train Generation
• Buffered Pulse Train Generation
• Finite Implicit Buffered Pulse Train Generation
• Continuous Buffered Implicit Pulse Train Generation
• Finite Buffered Sample Clocked Pulse Train Generation
• Continuous Buffered Sample Clocked Pulse Train Generation
Finite Pulse Train Generation
This function generates a train of pulses with programmable frequency and duty cycle for a
predetermined number of pulses. With cDAQ controller counters, the primary counter generates
the specified pulse train and the embedded counter counts the pulses generated by the primary
counter. When the embedded counter reaches the specified tick count, it generates a trigger that
stops the primary counter generation.
S OURCE
GATE
( S t a rt Trigger)
OUT