National Instruments AT-MIO-64F-5, Руководство пользователя

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Configuration and Installation Chapter 2
AT-MIO-64F-5 User Manual 2-36 © National Instruments Corporation
Output current, high-impedance state ±25 µA maximum
Figure 2-19 shows the timing requirements for the GATE and SOURCE input signals and the
timing specifications for the OUT output signals of the Am9513A.
sp
t t t
SOURCE
V
IH
V
IL
V
IH
V
IL
sc
sp
t gsu t gh
t gw
GATE
t out
OUT
V
OH
V
OL
sc
t
t
t
t
t
t = 145 nsec minimum
sp = 70 nsec minimum
gsu = 100 nsec minimum
gh = 10 nsec minimum
gw = 145 nsec minimum
out = 300 nsec maximum
Figure 2-19. General-Purpose Timing Signals
The GATE and OUT signal transitions in Figure 2-19 are referenced to the rising edge of the
SOURCE signal. This timing diagram assumes that the counters are programmed to count rising
edges. The same timing diagram, with the source signal inverted and referenced to the falling
edge of the source signal, applies to the case in which the counter is programmed to count falling
edges.
The signal applied at a SOURCE input can be used as a clock source by any of the Am9513A
counter/timers and by the Am9513A frequency division output FOUT. The signal applied to a
SOURCE input must not exceed a frequency of 6 MHz for proper operation of the Am9513A.
The Am9513A counters can be individually programmed to count rising or falling edges of
signals applied at any of the Am9513A SOURCE or GATE input pins.
In addition to the signals applied to the SOURCE and GATE inputs, the Am9513A generates
five internal timebase clocks from the clock signal supplied by the AT-MIO-64F-5. This clock
signal is selected by a register in the AT-MIO-64F-5 register set and then divided by 10. The
default value is 1 MHz into the Am9513A (10 MHz clock signal on the AT-MIO-64F-5). The
five internal timebase clocks can be used as counting sources, and these clocks have a maximum