National Instruments AT-MIO-64F-5, Руководство пользователя

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Chapter 4 Register Map and Descriptions
© National Instruments Corporation 4-29 AT-MIO-64F-5 User Manual
Bit Name Description (continued)
1CHAN_GHOST Channel Ghost Ð This bit is used to synchronize conversions for
multiple-rate channel scanning. When this bit is set in any channel
configuration value, the conversion occurs on the selected channel
but the value is not saved in the ADC FIFO. In addition, if the
sample counter is programmed to count samples from Source 4,
conversions with the CHAN_GHOST bit set are not counted.
When the CHAN_GHOST bit is clear, conversions occur normally
and are saved in the ADC FIFO.
0CHAN_DSP Channel DSP Ð This bit is used to flag channel data that is to be
serially sent over the RTSI bus to the AT-DSP2200. If the
CHAN_DSP bit is set, the associated channel conversion data is
sent over the RTSI bus. If CHAN_DSP is clear, channel
conversion data is not sent. The CHAN_DSP bit has no bearing on
whether or not the channel conversion data is stored in the
ADC FIFO. That is controlled by the CHAN_GHOST bit.
Writing to the channel configuration memory must be preceded with a strobe to the
CONFIGMEMCLR Register. After the channel configuration memory is set up, the first value
must be preloaded by accessing the CONFIGMEMLD Register. Writing to the CONFIGMEM
Register following a CONFIGMEMCLR automatically sequences into the memory list for
multiple-channel configuration values. Writing can continue until the end of the channel
configuration list is reached, or the memory becomes full. After the final write to the channel
configuration memory, the CONFIGMEMLD Register should be strobed to load the first channel
configuration value. At this point, the channel configuration memory is primed and does not
need to be accessed again until a new channel configuration sequence is desired.
Conversions, either by EXTCONV* or by Counter 3 of the Am9513A Counter/Timer,
automatically sequence through the channel configuration memory as programmed. When the
end of the channel configuration memory is detected, it is automatically reset to the first value in
the list. Strobing the DAQ Clear Register also resets the channel configuration memory to the
first value in the list without destroying existing channel configuration values. A strobe of the
CONFIGMEMLD Register is still necessary to load the first value in the memory.
Continual strobing of the CONFIGMEMLD Register with only one value in the list serves only
to reload this one value. Continual strobing with more than one value in the memory sequences
through the channel configuration list.
In the single-channel data acquisition mode, only one value should be written and loaded into the
channel configuration register.