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8 MULTIPLE CPU SYSTEM FUNCTIONS
8.4 Data Communication Between CPU Modules
169
8
• Programmable controller CPU (CPU No.1)
⇔
C Controller module (CPU No.2)
CPU
number
Processing order
Process on programmable controller CPU
(CPU No.1)
Process on C Controller module (CPU No.2)
CPU No.1
(1)
The device data for CPU No.1 is transferred to the
refresh area in CPU No.1.
(2)
The device data in the refresh area of CPU No.1 is sent
to CPU No.2.
CPU No.2
(3)
Device data in the refresh area of the CPU No.1 is read
to a user program by executing the C Controller module
dedicated function (CCPU_FromBufHG_ISR).
(4)
Device data for CPU No.2 is written to the fixed cycle
communication area of CPU No.2 by executing the C
Controller module dedicated function
(CCPU_ToBufHG_ISR).
(5)
Device data in the fixed cycle communication area of
CPU No.2 is sent to CPU No.1.
CPU No.1
(6)
The device data stored in the refresh area of CPU No.2
is transferred to the devices for CPU No.2.
(6)
(1)
(2)
(3)
(4)
(5)
Programmable controller CPU (CPU No.1)
C Controller module (CPU No.2)
CPU buffer memory
CPU buffer memory
Fixed cycle communication area of CPU No.1
Fixed cycle communication area of CPU No.1
Refresh area
Fixed cycle communication area of CPU No.2
Fixed cycle communication area of CPU No.2
Refresh area
Device
User program
For CPU No.1
Execution of the
CCPU_FromBuf
HG_ISR
function
For CPU No.2
Execution of the
CCPU_ToBuf
HG_ISR
function
Содержание MELSEC iQ-R C R12CCPU-V
Страница 1: ...MELSEC iQ R C Controller Module User s Manual Application R12CCPU V ...
Страница 2: ......
Страница 23: ...1 EXECUTING PROGRAMS 1 3 I O Access Timing 21 1 MEMO ...
Страница 32: ...30 3 MEMORY CONFIGURATION OF C Controller Module 3 4 Files MEMO ...
Страница 257: ...I 255 MEMO ...
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