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8 MULTIPLE CPU SYSTEM FUNCTIONS
8.4 Data Communication Between CPU Modules
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8
8.4
Data Communication Between CPU Modules
Data can be sent/received among CPU modules in a multiple CPU system. The direct access communication enables data
writing or reading among CPU modules.
Used memory
CPU buffer memory is used for data communication among CPU modules.
Memory configuration of CPU buffer memory
Communication method
Application
Description
Data communication with CPU buffer
memory
Use this communication method when
performing data send/receive at the
timing of each CPU module.
The sending side CPU module writes data to the CPU buffer memory in
the host CPU. The receiving side CPU module reads data from the CPU
buffer memory of the send target CPU module (another CPU).
Data communication with fixed cycle
communication area
Use this communication method when
performing data send/receive with
adjusting the timing between CPU
modules.
The sending side CPU module writes data in the fixed cycle
communication area (send area) in the host CPU. The receiving side
CPU module reads data from the fixed cycle communication area
(receive area) in the CPU module of the send source CPU module.
Area
Communication method
Description
Area size
CPU buffer memory
Communication through direct
access
Reads/writes data in the area of the
host CPU or other CPUs.
512K words fixed
Fixed cycle communication area
Communication through direct
access
Performs data communication between
the host CPU area and other CPU
areas in accordance with the set
interval.
Can be set within the range of 0 to 24K
words in total. The send area per single
CPU module can be set within the
range of 0 to 12K words. (
156 Setting fixed cycle communication
area)
CPU buffer memory
Fixed cycle communication area
Send area of CPU No.1
Send area of CPU No.2
Send area of CPU No.3
Send area of CPU No.4
Содержание MELSEC iQ-R C R12CCPU-V
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