Maxim DS80C400, Руководство пользователя, Страница: 4 / 96

DS80C400 Network Microcontroller
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EXTERNAL CLOCK OSCILLATOR (XTAL1) CHARACTERISTICS
PARAMETER SYMBOL MIN MAX UNITS
Clock Oscillator Period t
CLK
See External Clock
Oscillator Frequency
Clock Symmetry at 0.5 x V
CC3
t
CH
0.45 t
CLK
0.55 t
CLK
ns
Clock Rise Time t
CR
3 ns
Clock Fall Time t
CF
3 ns
EXTERNAL CLOCK DRIVE
SYSTEM CLOCK TIME PERIODS (t
CLCL
, t
CHCL
, t
CLCH
)
SYSTEM CLOCK SELECTION
SYSTEM CLOCK HIGH (t
CHCL
) AND
SYSTEM CLOCK LOW (t
CLCH
)
4X/
2X
CD1 CD0
SYSTEM CLOCK
PERIOD t
CLCL
MIN MAX
1 0 0 t
CLK
/ 4 0.45 (t
CLK
/ 4) 0.55 (t
CLK
/ 4)
0 0 0 t
CLK
/ 2 0.45 (t
CLK
/ 2) 0.55 (t
CLK
/ 2)
X 1 0 t
CLK
0.45 t
CLK
0.55 t
CLK
X 1 1 256 t
CLK
0.45 (256 t
CLK)
0.55 (256 t
CLK)
Note 1: Figure 20 shows a detailed description and illustration of the system clock selection.
Note 2: When an external clock oscillator is used in conjunction with the default system clock selection (CD1:CD0 = 10b), the
minimum/maximum system clock high (t
CHCL
) and system clock low (t
CLCH
) periods are directly related to clock oscillator duty cycle.
MOVX CHARACTERISTICS (MULTIPLEXED ADDRESS/DATA BUS) (Note 1)
(V
CC3
= 3.0V to 3.6V, V
CC1
= 1.8V ±10%, T
A
= -40
°
C to +85°C.)
PARAMETER SYMBOL MIN MAX UNITS
STRETCH VALUES
C
ST
(MD2:0)
t
CLCL
+ t
CHCL
- 5 C
ST
= 0
2t
CLCL
- 5 1 £ C
ST
£ 3 MOVX ALE Pulse Width t
LHLL2
6t
CLCL
- 5
ns
4 £ C
ST
£ 7
t
CHCL
- 5 C
ST
= 0
t
CLCL
- 6 1 £ C
ST
£ 3
Port 0 MOVX Address Valid
to ALE Low
t
AVLL2
5t
CLCL
- 6
ns
4 £ C
ST
£ 7
t
CLCH
- 2 C
ST
= 0
t
CLCL
- 2 1 £ C
ST
£ 3
Port 0 MOVX Address Hold
after ALE Low t
LLAX2
and t
LLAX3
5t
CLCL
- 2
ns
4 £ C
ST
£ 7
2t
CLCL
- 5 C
ST
= 0
RD
Pulse Width (P3.7 or
PSEN
)
t
RLRH
(4 x C
ST
) t
CLCL
- 3
ns
1 £ C
ST
£ 7
2t
CLCL
- 5 C
ST
= 0
WR
Pulse Width (P3.6) t
WLWH
(4 x C
ST
) t
CLCL
- 3
ns
1
£
C
ST
£
7
2t
CLCL
- 17 C
ST
= 0
RD
(P3.7 or
PSEN
) Low to
Valid Data In
t
RLDV
(4 x C
ST
) t
CLCL
- 17
ns
1
£
C
ST
£
7
Data Hold After
RD
(P3.7 or
PSEN
) High
t
RHDX
-2 ns
t
CR
t
CF
t
CLK
t
CH
XTAL1
t
CL