LSI Logic Confidential
Boundary Scan Chain Cells
17-19
Copyright © 2001, 2002 by LSI Logic Corporation. All rights reserved.
398
–
Control
[CTRL]
399
P20
SDRAM_CLK[0]
[OUT]
400
–
Control
[CTRL]
401
P19
SDRAM_DQ[7]
[IN/OUT]
402
–
Control
[CTRL]
403
P18
SDRAM_DQ[6]
[IN/OUT]
404
–
Control
[CTRL]
405
R20
SDRAM_DQ[5]
[IN/OUT]
406
–
Control
[CTRL]
407
P17
SDRAM_DQ[4]
[IN/OUT]
408
–
Control
[CTRL]
409
R19
SDRAM_DQS[0]
[IN/OUT]
410
–
Control
[CTRL]
411
T20
SDRAM_DQ[3]
[IN/OUT]
412
–
Control
[CTRL]
413
R18
SDRAM_DQ[2]
[IN/OUT]
414
–
Control
[CTRL]
415
T19
SDRAM_DQ[1]
[IN/OUT]
416
–
Control
[CTRL]
417
R17
SDRAM_DQ[0]
[IN/OUT]
418
–
DUMMY
[N/A]
419
–
DUMMY
[N/A]
420
–
DUMMY
[N/A]
421
–
DUMMY
[N/A]
422
–
Control
[CTRL]
Table 17.2
Boundary Scan Chain Cells (Cont.)
Cell
Pin
Name
Type
Содержание DMN-8600
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