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ML610471/472/473/Q471/Q472/Q473 User's Manual
Chapter 12 Port 0
12-7
12.3 Description of Operation
For each pin of Port 0, the setting of the Port 0 control registers 0 and 1 (P0CON0 and P0CON1) allows selection of
high-impedance input mode, input mode with a pull-down resistor, or input mode with a pull-up resistor.
High-impedance input mode is selected at system reset.
The pin level of Port 0 can be read by reading the Port 0 data register (P0D).
12.3.1 External Interrupt / Secondary Function
The Port 0 pins (P00, P01, P02, P03) can be used for P00 to P03 interrupts (P00INT to P03INT). The P00 to P03
interrupts are maskable and interrupt enable or disable can be selected. For interrupts, see Chapter 5, "Interrupt."
The P00 and P01 pins can be used as the trigger input to the capture circuit, and the P02 pin as the RXD0 input to the
UART0.
For the capture function, see Chapter 8, "Capture." For the UART function, see Chapter 11, "UART." For the timer
function, see Chapter 9, "Timer."
12.3.2 Interrupt Request
When an interrupt edge selected with the external interrupt control register 0, 1, or 2 (EXICON0, EXICON1, or
EXICON2) occurs at a Port 0 pin, any of the maskable P00 to P03 interrupts (P00INT to P03INT) occurs.
Figure 12-2 shows the P00 to P03 interrupt generation timing in rising-edge interrupt mode, in falling-edge interrupt
mode, and in both-edge interrupt mode without sampling and the P00 to P03 interrupt generation timing in rising-edge
interrupt mode with sampling.
(a) When Falling-Edge Interrupt Mode without Sampling is Selected
(b) When Rising-Edge Interrupt Mode without Sampling is Selected
(c) When Both-Edge Interrupt Mode without Sampling is Selected
SYSCLK
P0n pin
P0nINT
Interrupt request
QP0n
SYSCLK
P0n pin
P0nINT
Interrupt request
QP0n
SYSCLK
P0n pin
P0nINT
Interrupt request
QP0n